BDD2Seq: Enabling Scalable Reversible-Circuit Synthesis via Graph-to-Sequence Learning
Fuente:
arXiv
Saved in:
| Main Authors: | Miao, Mingkai, Tang, Jianheng, Hu, Guangyu, Zhang, Hongce |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
EvolveGen: Algorithmic Level Hardware Model Checking Benchmark Generation through Reinforcement Learning
by: Hu, Guangyu, et al.
Published: (2026)
by: Hu, Guangyu, et al.
Published: (2026)
LeGend: A Data-Driven Framework for Lemma Generation in Hardware Model Checking
by: Miao, Mingkai, et al.
Published: (2026)
by: Miao, Mingkai, et al.
Published: (2026)
DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations
by: Khan, Sadaf, et al.
Published: (2024)
by: Khan, Sadaf, et al.
Published: (2024)
E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis
by: Chen, Chen, et al.
Published: (2025)
by: Chen, Chen, et al.
Published: (2025)
NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph
by: Fang, Wenji, et al.
Published: (2025)
by: Fang, Wenji, et al.
Published: (2025)
Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits
by: Deng, Chenhui, et al.
Published: (2024)
by: Deng, Chenhui, et al.
Published: (2024)
AutoPDR: Circuit-Aware Solver Configuration Prediction for Hardware Model Checking
by: Hu, Guangyu, et al.
Published: (2026)
by: Hu, Guangyu, et al.
Published: (2026)
CircuitVAE: Efficient and Scalable Latent Circuit Optimization
by: Song, Jialin, et al.
Published: (2024)
by: Song, Jialin, et al.
Published: (2024)
ARCS: Autoregressive Circuit Synthesis with Topology-Aware Graph Attention and Spec Conditioning
by: Pathak, Tushar Dhananjay
Published: (2026)
by: Pathak, Tushar Dhananjay
Published: (2026)
E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis
by: Chen, Chen, et al.
Published: (2024)
by: Chen, Chen, et al.
Published: (2024)
FuncGNN: Learning Functional Semantics of Logic Circuits with Graph Neural Networks
by: Zhao, Qiyun
Published: (2025)
by: Zhao, Qiyun
Published: (2025)
AutoPPA: Automated Circuit PPA Optimization via Contrastive Code-based Rule Library Learning
by: Li, Chongxiao, et al.
Published: (2026)
by: Li, Chongxiao, et al.
Published: (2026)
GraCo -- A Graph Composer for Integrated Circuits
by: Uhlich, Stefan, et al.
Published: (2024)
by: Uhlich, Stefan, et al.
Published: (2024)
Graph Neural Networks Based Analog Circuit Link Prediction
by: Pan, Guanyuan, et al.
Published: (2025)
by: Pan, Guanyuan, et al.
Published: (2025)
AutoINV: Automated Invariant Generation Framework for Formal Verification on High-Level Synthesis Designs
by: Zhou, Xiaofeng, et al.
Published: (2026)
by: Zhou, Xiaofeng, et al.
Published: (2026)
Boolean-aware Boolean Circuit Classification: A Comprehensive Study on Graph Neural Network
by: Ni, Liwei, et al.
Published: (2024)
by: Ni, Liwei, et al.
Published: (2024)
OptINC: Optical In-Network-Computing for Scalable Distributed Learning
by: Fei, Sijie, et al.
Published: (2026)
by: Fei, Sijie, et al.
Published: (2026)
TCL: Enabling Fast and Efficient Cross-Hardware Tensor Program Optimization via Continual Learning
by: Shen, Chaoyao, et al.
Published: (2026)
by: Shen, Chaoyao, et al.
Published: (2026)
Beyond Tokens: Enhancing RTL Quality Estimation via Structural Graph Learning
by: Liu, Yi, et al.
Published: (2025)
by: Liu, Yi, et al.
Published: (2025)
Security Risks in Machining Process Monitoring: Sequence-to-Sequence Learning for Reconstruction of CNC Axis Positions
by: Krupp, Lukas, et al.
Published: (2026)
by: Krupp, Lukas, et al.
Published: (2026)
ShortCircuit: AlphaZero-Driven Circuit Design
by: Tsaras, Dimitrios, et al.
Published: (2024)
by: Tsaras, Dimitrios, et al.
Published: (2024)
PreRoutGNN for Timing Prediction with Order Preserving Partition: Global Circuit Pre-training, Local Delay Learning and Attentional Cell Modeling
by: Zhong, Ruizhe, et al.
Published: (2024)
by: Zhong, Ruizhe, et al.
Published: (2024)
TransPlace: Transferable Circuit Global Placement via Graph Neural Network
by: Hou, Yunbo, et al.
Published: (2025)
by: Hou, Yunbo, et al.
Published: (2025)
DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale
by: Zheng, Ziyang, et al.
Published: (2025)
by: Zheng, Ziyang, et al.
Published: (2025)
Circuit Transformer: A Transformer That Preserves Logical Equivalence
by: Li, Xihan, et al.
Published: (2024)
by: Li, Xihan, et al.
Published: (2024)
A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA
by: Fang, Wenji, et al.
Published: (2025)
by: Fang, Wenji, et al.
Published: (2025)
The prediction of the quality of results in Logic Synthesis using Transformer and Graph Neural Networks
by: Yang, Chenghao, et al.
Published: (2022)
by: Yang, Chenghao, et al.
Published: (2022)
AnalogGenie: A Generative Engine for Automatic Discovery of Analog Circuit Topologies
by: Gao, Jian, et al.
Published: (2025)
by: Gao, Jian, et al.
Published: (2025)
ZeroSim: Zero-Shot Analog Circuit Evaluation with Unified Transformer Embeddings
by: Yang, Xiaomeng, et al.
Published: (2025)
by: Yang, Xiaomeng, et al.
Published: (2025)
GenEDA: Towards Generative Netlist Functional Reasoning via Cross-Modal Circuit Encoder-Decoder Alignment
by: Fang, Wenji, et al.
Published: (2025)
by: Fang, Wenji, et al.
Published: (2025)
Enabling Long FFT Convolutions on Memory-Constrained FPGAs via Chunking
by: Wang, Peter, et al.
Published: (2025)
by: Wang, Peter, et al.
Published: (2025)
A Precision-Scalable RISC-V DNN Processor with On-Device Learning Capability at the Extreme Edge
by: Huang, Longwei, et al.
Published: (2023)
by: Huang, Longwei, et al.
Published: (2023)
PICBench: Benchmarking LLMs for Photonic Integrated Circuits Design
by: Wu, Yuchao, et al.
Published: (2025)
by: Wu, Yuchao, et al.
Published: (2025)
GCoD: Graph Convolutional Network Acceleration via Dedicated Algorithm and Accelerator Co-Design
by: You, Haoran, et al.
Published: (2021)
by: You, Haoran, et al.
Published: (2021)
DE-HNN: An effective neural model for Circuit Netlist representation
by: Luo, Zhishang, et al.
Published: (2024)
by: Luo, Zhishang, et al.
Published: (2024)
FPGA-Enabled Machine Learning Applications in Earth Observation: A Systematic Review
by: Léonard, Cédric, et al.
Published: (2025)
by: Léonard, Cédric, et al.
Published: (2025)
DOMAC: Differentiable Optimization for High-Speed Multipliers and Multiply-Accumulators
by: Xue, Chenhao, et al.
Published: (2025)
by: Xue, Chenhao, et al.
Published: (2025)
Automated Design and Optimization of Distributed Filtering Circuits via Reinforcement Learning
by: Gao, Peng, et al.
Published: (2024)
by: Gao, Peng, et al.
Published: (2024)
LLM-based AI Agent for Sizing of Analog and Mixed Signal Circuit
by: Liu, Chang, et al.
Published: (2025)
by: Liu, Chang, et al.
Published: (2025)
SiHGNN: Leveraging Properties of Semantic Graphs for Efficient HGNN Acceleration
by: Xue, Runzhen, et al.
Published: (2024)
by: Xue, Runzhen, et al.
Published: (2024)
Similar Items
-
EvolveGen: Algorithmic Level Hardware Model Checking Benchmark Generation through Reinforcement Learning
by: Hu, Guangyu, et al.
Published: (2026) -
LeGend: A Data-Driven Framework for Lemma Generation in Hardware Model Checking
by: Miao, Mingkai, et al.
Published: (2026) -
DeepSeq2: Enhanced Sequential Circuit Learning with Disentangled Representations
by: Khan, Sadaf, et al.
Published: (2024) -
E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis
by: Chen, Chen, et al.
Published: (2025) -
NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph
by: Fang, Wenji, et al.
Published: (2025)