Cover Image

QUILL: An Algorithm-Architecture Co-Design for Cache-Local Deformable Attention

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Oh, Hyunwoo, Chen, Hanning, Yun, Sanggeon, Ni, Yang, Huang, Wenjun, Das, Tamoghno, Jang, Suyeon, Imani, Mohsen
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture Computer Vision and Pattern Recognition Machine Learning
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

TorR: Towards Brain-Inspired Task-Oriented Reasoning via Cache-Oriented Algorithm-Architecture Co-design
by: Oh, Hyunwoo, et al.
Published: (2026)

T-SAR: A Full-Stack Co-design for CPU-Only Ternary LLM Inference via In-Place SIMD ALU Reorganization
by: Oh, Hyunwoo, et al.
Published: (2025)

TRINE: A Token-Aware, Runtime-Adaptive FPGA Inference Engine for Multimodal AI
by: Oh, Hyunwoo, et al.
Published: (2026)

ASTER: Attention-based Spiking Transformer Engine for Event-driven Reasoning
by: Das, Tamoghno, et al.
Published: (2025)

HyperSense: Hyperdimensional Intelligent Sensing for Energy-Efficient Sparse Data Processing
by: Yun, Sanggeon, et al.
Published: (2024)

HDReason: Algorithm-Hardware Codesign for Hyperdimensional Knowledge Graph Reasoning
by: Chen, Hanning, et al.
Published: (2024)

Neuro-Photonix: Enabling Near-Sensor Neuro-Symbolic AI Computing on Silicon Photonics Substrate
by: Najafi, Deniz, et al.
Published: (2024)

Accelerating Multi-Scale Deformable Attention Using Near-Memory-Processing Architecture
by: Li, Huize, et al.
Published: (2026)

Towards Efficient Hyperdimensional Computing Using Photonics
by: Fayza, Farbin, et al.
Published: (2023)

AVERY: Intent-Driven Adaptive VLM Split Computing via Embodied Self-Awareness for Efficient Disaster Response Systems
by: Bhattacharjya, Rajat, et al.
Published: (2025)

HYPERDOA: Robust and Efficient DoA Estimation using Hyperdimensional Computing
by: Bhattacharjya, Rajat, et al.
Published: (2025)

DaDu-Corki: Algorithm-Architecture Co-Design for Embodied AI-powered Robotic Manipulation
by: Huang, Yiyang, et al.
Published: (2024)

MERE: Hardware-Software Co-Design for Masking Cache Miss Latency in Embedded Processors
by: You, Dean, et al.
Published: (2025)

CMD: A Cache-assisted GPU Memory Deduplication Architecture
by: Zhao, Wei, et al.
Published: (2024)

ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
by: Petrolo, Vincenzo, et al.
Published: (2025)

UniCAIM: A Unified CAM/CIM Architecture with Static-Dynamic KV Cache Pruning for Efficient Long-Context LLM Inference
by: Xu, Weikai, et al.
Published: (2025)

The Avatar Cache: Enabling On-Demand Security with Morphable Cache Architecture
by: Bhatla, Anubhav, et al.
Published: (2026)

Random and Safe Cache Architecture to Defeat Cache Timing Attacks
by: Hu, Guangyuan, et al.
Published: (2023)

gem5 Co-Pilot: AI Assistant Agent for Architectural Design Space Exploration
by: Fu, Zuoming, et al.
Published: (2025)

Multi-Dimensional Vector ISA Extension for Mobile In-Cache Computing
by: Khadem, Alireza, et al.
Published: (2025)

3D MPSoC with On-Chip Cache Support -- Design and Exploitation
by: Cataldo, Rodrigo, et al.
Published: (2025)

Per-Bank Bandwidth Regulation of Shared Last-Level Cache for Real-Time Systems
by: Sullivan, Connor, et al.
Published: (2024)

COBRA: Algorithm-Architecture Co-optimized Binary Transformer Accelerator for Edge Inference
by: Qiao, Ye, et al.
Published: (2025)

Harmonia: Algorithm-Hardware Co-Design for Memory- and Compute-Efficient BFP-based LLM Inference
by: Wang, Xinyu, et al.
Published: (2026)

CogSys: Efficient and Scalable Neurosymbolic Cognition System via Algorithm-Hardware Co-Design
by: Wan, Zishen, et al.
Published: (2025)

Garibaldi: A Pairwise Instruction-Data Management for Enhancing Shared Last-Level Cache Performance in Server Workloads
by: Kwon, Jaewon, et al.
Published: (2025)

Learning Cache Coherence Traffic for NoC Routing Design
by: Xiong, Guochu, et al.
Published: (2025)

Rhea: a Framework for Fast Design and Validation of RTL Cache-Coherent Memory Subsystems
by: Zoni, Davide, et al.
Published: (2025)

In-place Switch: Reprogramming based SLC Cache Design for Hybrid 3D SSDs
by: Yang, Xufeng, et al.
Published: (2024)

SliceMoE: Bit-Sliced Expert Caching under Miss-Rate Constraints for Efficient MoE Inference
by: Choi, Yuseon, et al.
Published: (2025)

Systematic Evaluation of Randomized Cache Designs against Cache Occupancy
by: Chakraborty, Anirban, et al.
Published: (2023)

A Near-Cache Architectural Framework for Cryptographic Computing
by: Zhang, Jingyao, et al.
Published: (2025)

DEFA: Efficient Deformable Attention Acceleration via Pruning-Assisted Grid-Sampling and Multi-Scale Parallel Processing
by: Xu, Yansong, et al.
Published: (2024)

The Z1: Architecture and Algorithms of Konrad Zuse's First Computer
by: Rojas, Raul
Published: (2014)

PREFENDER: A Prefetching Defender against Cache Side Channel Attacks as A Pretender
by: Li, Luyi, et al.
Published: (2023)

APSQ: Additive Partial Sum Quantization with Algorithm-Hardware Co-Design
by: Tan, Yonghao, et al.
Published: (2025)

NEURAL: An Elastic Neuromorphic Architecture with Hybrid Data-Event Execution and On-the-fly Attention Dataflow
by: Chen, Yuehai, et al.
Published: (2025)

FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Large Attention-Based Model Inference on Tile-Based Accelerators
by: Zhang, Chi, et al.
Published: (2026)

Accelerating PageRank Algorithmic Tasks with a new Programmable Hardware Architecture
by: Chowdhury, Md Rownak Hossain, et al.
Published: (2024)

FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Efficient Multi-Head Attention on Tile-Based Many-PE Accelerators
by: Zhang, Chi, et al.
Published: (2025)