Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond
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arXiv
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| Main Authors: | , , , , , |
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| Format: | Preprint |
| Published: |
2025
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| _version_ | 1866912719143174144 |
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| author | Scheffler, Paul Benz, Thomas Fischer, Tim Leone, Lorenzo Arjmandpour, Sina Benini, Luca |
| author_facet | Scheffler, Paul Benz, Thomas Fischer, Tim Leone, Lorenzo Arjmandpour, Sina Benini, Luca |
| contents | We present a roadmap for open-source chiplet-based RISC-V systems targeting high-performance computing and artificial intelligence, aiming to close the performance gap to proprietary designs. Starting with Occamy, the first open, silicon-proven dual-chiplet RISC-V manycore in 12nm FinFET, we scale to Ramora, a mesh-NoC-based dual-chiplet system, and to Ogopogo, a 7nm quad-chiplet concept architecture achieving state-of-the-art compute density. Finally, we explore possible avenues to extend openness beyond logic-core RTL into simulation, EDA, PDKs, and off-die PHYs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2511_15564 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond Scheffler, Paul Benz, Thomas Fischer, Tim Leone, Lorenzo Arjmandpour, Sina Benini, Luca Hardware Architecture We present a roadmap for open-source chiplet-based RISC-V systems targeting high-performance computing and artificial intelligence, aiming to close the performance gap to proprietary designs. Starting with Occamy, the first open, silicon-proven dual-chiplet RISC-V manycore in 12nm FinFET, we scale to Ramora, a mesh-NoC-based dual-chiplet system, and to Ogopogo, a 7nm quad-chiplet concept architecture achieving state-of-the-art compute density. Finally, we explore possible avenues to extend openness beyond logic-core RTL into simulation, EDA, PDKs, and off-die PHYs. |
| title | Toward Open-Source Chiplets for HPC and AI: Occamy and Beyond |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2511.15564 |