FPGA-tailored algorithms for real-time decoding of quantum LDPC codes

Fuente: arXiv
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Auteurs principaux: Maurya, Satvik, Maurer, Thilo, Bühler, Markus, Vandeth, Drew, Beverland, Michael E.
Format: Preprint
Publié: 2025
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author Maurya, Satvik
Maurer, Thilo
Bühler, Markus
Vandeth, Drew
Beverland, Michael E.
author_facet Maurya, Satvik
Maurer, Thilo
Bühler, Markus
Vandeth, Drew
Beverland, Michael E.
contents Real-time decoding is crucial for fault-tolerant quantum computing but likely requires specialized hardware such as field-programmable gate arrays (FPGAs), whose parallelism can alter relative algorithmic performance. We analyze FPGA-tailored versions of three decoder classes for quantum low-density parity-check (qLDPC) codes: message passing, ordered statistics, and clustering. For message passing, we analyze the recently introduced Relay decoder and its FPGA implementation; for ordered statistics decoding (OSD), we introduce a filtered variant that concentrates computation on high-likelihood fault locations; and for clustering, we design an FPGA-adapted generalized union-find decoder. We design a systolic algorithm for Gaussian elimination on rank-deficient systems that runs in linear parallel time, enabling fast validity checks and local corrections in clustering and eliminating costly full-rank inversion in filtered-OSD. Despite these improvements, both remain far slower and less accurate than Relay, suggesting message passing is the most viable route to real-time qLDPC decoding.
format Preprint
id arxiv_https___arxiv_org_abs_2511_21660
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle FPGA-tailored algorithms for real-time decoding of quantum LDPC codes
Maurya, Satvik
Maurer, Thilo
Bühler, Markus
Vandeth, Drew
Beverland, Michael E.
Quantum Physics
Real-time decoding is crucial for fault-tolerant quantum computing but likely requires specialized hardware such as field-programmable gate arrays (FPGAs), whose parallelism can alter relative algorithmic performance. We analyze FPGA-tailored versions of three decoder classes for quantum low-density parity-check (qLDPC) codes: message passing, ordered statistics, and clustering. For message passing, we analyze the recently introduced Relay decoder and its FPGA implementation; for ordered statistics decoding (OSD), we introduce a filtered variant that concentrates computation on high-likelihood fault locations; and for clustering, we design an FPGA-adapted generalized union-find decoder. We design a systolic algorithm for Gaussian elimination on rank-deficient systems that runs in linear parallel time, enabling fast validity checks and local corrections in clustering and eliminating costly full-rank inversion in filtered-OSD. Despite these improvements, both remain far slower and less accurate than Relay, suggesting message passing is the most viable route to real-time qLDPC decoding.
title FPGA-tailored algorithms for real-time decoding of quantum LDPC codes
topic Quantum Physics
url https://arxiv.org/abs/2511.21660