3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison
Fuente:
arXiv
Saved in:
| Main Authors: | Cheshmikhani, Elham, Farbeh, Hamed, Asad, Hossein |
|---|---|
| Format: | Preprint |
| Published: |
2025
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation
by: Cheshmikhani, Elham, et al.
Published: (2026)
by: Cheshmikhani, Elham, et al.
Published: (2026)
A Low-Cost Reliable Racetrack Cache Based on Data Compression
by: Cheshmikhani, Elham, et al.
Published: (2025)
by: Cheshmikhani, Elham, et al.
Published: (2025)
ROBIN: Incremental Oblique Interleaved ECC for Reliability Improvement in STT-MRAM Caches
by: Cheshmikhani, Elham, et al.
Published: (2026)
by: Cheshmikhani, Elham, et al.
Published: (2026)
An Analytical and Empirical Investigation of Tag Partitioning for Energy-Efficient Reliable Cache
by: Cheshmikhani, Elham, et al.
Published: (2025)
by: Cheshmikhani, Elham, et al.
Published: (2025)
Stoch-IMC: A Bit-Parallel Stochastic In-Memory Computing Architecture Based on STT-MRAM
by: Hajisadeghi, Amir M., et al.
Published: (2024)
by: Hajisadeghi, Amir M., et al.
Published: (2024)
Online Soft Error Tolerance in ReRAM Crossbars for Deep Learning Accelerators
by: Khezeli, Benyamin, et al.
Published: (2024)
by: Khezeli, Benyamin, et al.
Published: (2024)
Scaling Analog Photonic Accelerators for Byte-Size, Integer General Matrix Multiply (GEMM) Kernels
by: Alo, Oluwaseun Adewunmi, et al.
Published: (2024)
by: Alo, Oluwaseun Adewunmi, et al.
Published: (2024)
Modeling and Simulation Frameworks for Processing-in-Memory Architectures
by: Aghaei, Mahdi, et al.
Published: (2025)
by: Aghaei, Mahdi, et al.
Published: (2025)
A Low-Dissipation and Scalable GEMM Accelerator with Silicon Nitride Photonics
by: Karempudi, Venkata Sai Praneeth, et al.
Published: (2024)
by: Karempudi, Venkata Sai Praneeth, et al.
Published: (2024)
OISMA: On-the-fly In-memory Stochastic Multiplication Architecture for Matrix-Multiplication Workloads
by: Agwa, Shady, et al.
Published: (2025)
by: Agwa, Shady, et al.
Published: (2025)
DISCA: A Digital In-memory Stochastic Computing Architecture Using A Compressed Bent-Pyramid Format
by: Agwa, Shady, et al.
Published: (2025)
by: Agwa, Shady, et al.
Published: (2025)
DRAGON (Differentiable Graph Execution) : A suite of Hardware Simulation and Optimization tools for Modern AI/Non-AI Workloads
by: Sethi, Khushal
Published: (2022)
by: Sethi, Khushal
Published: (2022)
A 5T-2MTJ STT-assisted Spin Orbit Torque based Ternary Content Addressable Memory for Hardware Accelerators
by: Narla, Siri, et al.
Published: (2024)
by: Narla, Siri, et al.
Published: (2024)
An Energy-Aware RIoT System: Analysis, Modeling and Prediction in the SUPERIOT Framework
by: Bocus, Mohammud J., et al.
Published: (2025)
by: Bocus, Mohammud J., et al.
Published: (2025)
A Novel Low-Power Cache Architecture Based on 6-Transistor SRAM Cells
by: Dizabadi, Naser Khatti, et al.
Published: (2026)
by: Dizabadi, Naser Khatti, et al.
Published: (2026)
Partially-Precise Computing Paradigm for Efficient Hardware Implementation of Application-Specific Embedded Systems
by: Faryabi, Mohsen, et al.
Published: (2024)
by: Faryabi, Mohsen, et al.
Published: (2024)
Wattlytics: A Web Platform for Co-Optimizing Performance, Energy, and TCO in HPC Clusters
by: Afzal, Ayesha, et al.
Published: (2026)
by: Afzal, Ayesha, et al.
Published: (2026)
Device-Circuit Co-Design of Variation-Resilient Read and Write Drivers for Antiferromagnetic Tunnel Junction (AFMTJ) Memories
by: Choudhary, Yousuf, et al.
Published: (2026)
by: Choudhary, Yousuf, et al.
Published: (2026)
ReCross: Efficient Embedding Reduction Scheme for In-Memory Computing using ReRAM-Based Crossbar
by: Lai, Yu-Hong, et al.
Published: (2025)
by: Lai, Yu-Hong, et al.
Published: (2025)
Towards Efficient Flash Caches with Emerging NVMe Flexible Data Placement SSDs
by: Allison, Michael, et al.
Published: (2025)
by: Allison, Michael, et al.
Published: (2025)
Omni 3D: BEOL-Compatible 3D Logic with Omnipresent Power, Signal, and Clock
by: Choi, Suhyeong, et al.
Published: (2024)
by: Choi, Suhyeong, et al.
Published: (2024)
Opportunities and Challenges for 3D Systems and Their Design
by: Emma, Philip, et al.
Published: (2025)
by: Emma, Philip, et al.
Published: (2025)
Fine Grain 3D Integration for Microarchitecture Design Through Cube Packing Exploration
by: Liu, Yongxiang, et al.
Published: (2025)
by: Liu, Yongxiang, et al.
Published: (2025)
Monolithic 3D Integration for Null Convention Logic (NCL)-Based Asynchronous Circuits
by: Zhang, Xiameng, et al.
Published: (2026)
by: Zhang, Xiameng, et al.
Published: (2026)
ARMAN: A Reconfigurable Monolithic 3D Accelerator Architecture for Convolutional Neural Networks
by: Sedaghatgoo, Ali, et al.
Published: (2024)
by: Sedaghatgoo, Ali, et al.
Published: (2024)
Through Silicon Via Aware Design Planning for Thermally Efficient 3-D Integrated Circuits
by: Chen, Yibo, et al.
Published: (2025)
by: Chen, Yibo, et al.
Published: (2025)
I/O Transit Caching for PMem-based Block Device
by: Xu, Qing, et al.
Published: (2024)
by: Xu, Qing, et al.
Published: (2024)
Toward Digital Twins in 3D IC Packaging: A Critical Review of Physics, Data, and Hybrid Architectures
by: Datta, Gourab, et al.
Published: (2026)
by: Datta, Gourab, et al.
Published: (2026)
H3PIMAP: A Heterogeneity-Aware Multi-Objective DNN Mapping Framework on Electronic-Photonic Processing-in-Memory Architectures
by: Yin, Ziang, et al.
Published: (2025)
by: Yin, Ziang, et al.
Published: (2025)
SKYLIGHT: A Scalable Hundred-Channel 3D Photonic In-Memory Tensor Core Architecture for Real-time AI Inference
by: Zhang, Meng, et al.
Published: (2026)
by: Zhang, Meng, et al.
Published: (2026)
Harnessing the Full Potential of RRAMs through Scalable and Distributed In-Memory Computing with Integrated Error Correction
by: Vo, Huynh Q. N., et al.
Published: (2025)
by: Vo, Huynh Q. N., et al.
Published: (2025)
Scaling Intelligence: Designing Data Centers for Next-Gen Language Models
by: Tithi, Jesmin Jahan, et al.
Published: (2025)
by: Tithi, Jesmin Jahan, et al.
Published: (2025)
ICGMM: CXL-enabled Memory Expansion with Intelligent Caching Using Gaussian Mixture Model
by: Chen, Hanqiu, et al.
Published: (2024)
by: Chen, Hanqiu, et al.
Published: (2024)
A Novel Thermal Network Model and Electro-Thermal Coupling Study for NSFETs and CFETs Considering Thermal Crosstalk
by: Miao, Tianci, et al.
Published: (2025)
by: Miao, Tianci, et al.
Published: (2025)
Length-Matching Routing for Programmable Photonic Circuits Using Best-First Strategy
by: Wang, Xiaoke, et al.
Published: (2025)
by: Wang, Xiaoke, et al.
Published: (2025)
STAMP-2.5D: Structural and Thermal Aware Methodology for Placement in 2.5D Integration
by: Parekh, Varun Darshana, et al.
Published: (2025)
by: Parekh, Varun Darshana, et al.
Published: (2025)
Sequencing on Silicon: AI SoC Design for Mobile Genomics at the Edge
by: Magierowski, Sebastian, et al.
Published: (2025)
by: Magierowski, Sebastian, et al.
Published: (2025)
Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
by: Chen, Guan-Cheng, et al.
Published: (2025)
by: Chen, Guan-Cheng, et al.
Published: (2025)
SMART-WRITE: Adaptive Learning-based Write Energy Optimization for Phase Change Memory
by: Desai, Mahek, et al.
Published: (2025)
by: Desai, Mahek, et al.
Published: (2025)
Vital Signs Monitoring with mmWave OFDM JCAS System
by: Dobosz, Jakub, et al.
Published: (2025)
by: Dobosz, Jakub, et al.
Published: (2025)
Similar Items
-
Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation
by: Cheshmikhani, Elham, et al.
Published: (2026) -
A Low-Cost Reliable Racetrack Cache Based on Data Compression
by: Cheshmikhani, Elham, et al.
Published: (2025) -
ROBIN: Incremental Oblique Interleaved ECC for Reliability Improvement in STT-MRAM Caches
by: Cheshmikhani, Elham, et al.
Published: (2026) -
An Analytical and Empirical Investigation of Tag Partitioning for Energy-Efficient Reliable Cache
by: Cheshmikhani, Elham, et al.
Published: (2025) -
Stoch-IMC: A Bit-Parallel Stochastic In-Memory Computing Architecture Based on STT-MRAM
by: Hajisadeghi, Amir M., et al.
Published: (2024)