APA (7th ed.) Citation

Jiang, H., Guo, Y., Guo, S., Liu, H., Li, X., Wang, N., & Di, Z. (2025). Critical Path Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs.

Chicago Style (17th ed.) Citation

Jiang, He, Yi Guo, Shikai Guo, Huijiang Liu, Xiaochen Li, Ning Wang, and Zhixiong Di. Critical Path Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs. 2025.

MLA (9th ed.) Citation

Jiang, He, et al. Critical Path Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs. 2025.