Citazione Stile APA (7a Edizione)

Jiang, H., Guo, Y., Guo, S., Liu, H., Li, X., Wang, N., & Di, Z. (2025). Critical Path Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs.

Citazione stile Chigago Style (17a edizione)

Jiang, He, Yi Guo, Shikai Guo, Huijiang Liu, Xiaochen Li, Ning Wang, e Zhixiong Di. Critical Path Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs. 2025.

Citatione MLA (9a ed.)

Jiang, He, et al. Critical Path Aware Timing-Driven Global Placement for Large-Scale Heterogeneous FPGAs. 2025.