Assessing Large Language Models in Generating RTL Design Specifications
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arXiv
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| Format: | Preprint |
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2025
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| _version_ | 1866912737694580736 |
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| author | Huang, Hung-Ming Yang, Yu-Hsin Chang, Fu-Chieh Hsu, Yun-Chia Lin, Yin-Yu Tsai, Ming-Fang Yang, Chun-Chih Wu, Pei-Yuan |
| author_facet | Huang, Hung-Ming Yang, Yu-Hsin Chang, Fu-Chieh Hsu, Yun-Chia Lin, Yin-Yu Tsai, Ming-Fang Yang, Chun-Chih Wu, Pei-Yuan |
| contents | As IC design grows more complex, automating comprehension and documentation of RTL code has become increasingly important. Engineers currently should manually interpret existing RTL code and write specifications, a slow and error-prone process. Although LLMs have been studied for generating RTL from specifications, automated specification generation remains underexplored, largely due to the lack of reliable evaluation methods. To address this gap, we investigate how prompting strategies affect RTL-to-specification quality and introduce metrics for faithfully evaluating generated specs. We also benchmark open-source and commercial LLMs, providing a foundation for more automated and efficient specification workflows in IC design. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2512_00045 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Assessing Large Language Models in Generating RTL Design Specifications Huang, Hung-Ming Yang, Yu-Hsin Chang, Fu-Chieh Hsu, Yun-Chia Lin, Yin-Yu Tsai, Ming-Fang Yang, Chun-Chih Wu, Pei-Yuan Hardware Architecture Artificial Intelligence As IC design grows more complex, automating comprehension and documentation of RTL code has become increasingly important. Engineers currently should manually interpret existing RTL code and write specifications, a slow and error-prone process. Although LLMs have been studied for generating RTL from specifications, automated specification generation remains underexplored, largely due to the lack of reliable evaluation methods. To address this gap, we investigate how prompting strategies affect RTL-to-specification quality and introduce metrics for faithfully evaluating generated specs. We also benchmark open-source and commercial LLMs, providing a foundation for more automated and efficient specification workflows in IC design. |
| title | Assessing Large Language Models in Generating RTL Design Specifications |
| topic | Hardware Architecture Artificial Intelligence |
| url | https://arxiv.org/abs/2512.00045 |