Ternary-Input Binary-Weight CNN Accelerator Design for Miniature Object Classification System with Query-Driven Spatial DVS
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arXiv
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| Main Authors: | Li, Yuyang, Muloor, Swasthik, Laudati, Jack, Dematteis, Nickolas, Park, Yidam, Kim, Hana, Chang, Nathan, Lee, Inhee |
|---|---|
| Format: | Preprint |
| Published: |
2025
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| Online Access: | |
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