Variable Point: A Number Format for Area- and Energy-Efficient Multiplication of High-Dynamic-Range Numbers
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| Main Authors: | , , , |
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| Format: | Preprint |
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2025
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| _version_ | 1866918223930195968 |
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| author | Mirfarshbafan, Seyed Hadi Filliol, Nicolas Castañeda, Oscar Studer, Christoph |
| author_facet | Mirfarshbafan, Seyed Hadi Filliol, Nicolas Castañeda, Oscar Studer, Christoph |
| contents | Fixed-point number representation is commonly employed in digital VLSI designs that have stringent hardware efficiency constraints. However, fixed-point numbers cover a relatively small dynamic range for a given bitwidth. In contrast, floating-point numbers offer a larger dynamic range at the cost of increased hardware complexity. In this paper, we propose a novel number format called variable-point (VP). VP numbers cover a larger dynamic range than fixed-point numbers with similar bitwidth, without notably increasing hardware complexity -- this allows for a more efficient representation of signals with high dynamic range. To demonstrate the efficacy of the proposed VP number format, we consider a matrix-vector multiplication engine for spatial equalization in multi-antenna wireless communication systems involving high-dynamic-range signals. Through post-layout VLSI implementation results, we demonstrate that the proposed VP-based design achieves 20% and 10% area and power savings, respectively, compared to a fully optimized fixed-point design, without incurring any noticeable performance degradation. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2512_00186 |
| institution | arXiv |
| publishDate | 2025 |
| record_format | arxiv |
| spellingShingle | Variable Point: A Number Format for Area- and Energy-Efficient Multiplication of High-Dynamic-Range Numbers Mirfarshbafan, Seyed Hadi Filliol, Nicolas Castañeda, Oscar Studer, Christoph Hardware Architecture Signal Processing Fixed-point number representation is commonly employed in digital VLSI designs that have stringent hardware efficiency constraints. However, fixed-point numbers cover a relatively small dynamic range for a given bitwidth. In contrast, floating-point numbers offer a larger dynamic range at the cost of increased hardware complexity. In this paper, we propose a novel number format called variable-point (VP). VP numbers cover a larger dynamic range than fixed-point numbers with similar bitwidth, without notably increasing hardware complexity -- this allows for a more efficient representation of signals with high dynamic range. To demonstrate the efficacy of the proposed VP number format, we consider a matrix-vector multiplication engine for spatial equalization in multi-antenna wireless communication systems involving high-dynamic-range signals. Through post-layout VLSI implementation results, we demonstrate that the proposed VP-based design achieves 20% and 10% area and power savings, respectively, compared to a fully optimized fixed-point design, without incurring any noticeable performance degradation. |
| title | Variable Point: A Number Format for Area- and Energy-Efficient Multiplication of High-Dynamic-Range Numbers |
| topic | Hardware Architecture Signal Processing |
| url | https://arxiv.org/abs/2512.00186 |