Cover Image

A Low-Cost Reliable Racetrack Cache Based on Data Compression

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Cheshmikhani, Elham, Shokouhinia, Fateme, Farbeh, Hamed
Format:	Preprint
Published:	2025
Subjects:	Emerging Technologies Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

3RSeT: Read Disturbance Rate Reduction in STT-MRAM Caches by Selective Tag Comparison
by: Cheshmikhani, Elham, et al.
Published: (2025)

An Analytical and Empirical Investigation of Tag Partitioning for Energy-Efficient Reliable Cache
by: Cheshmikhani, Elham, et al.
Published: (2025)

Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation
by: Cheshmikhani, Elham, et al.
Published: (2026)

ROBIN: Incremental Oblique Interleaved ECC for Reliability Improvement in STT-MRAM Caches
by: Cheshmikhani, Elham, et al.
Published: (2026)

Online Soft Error Tolerance in ReRAM Crossbars for Deep Learning Accelerators
by: Khezeli, Benyamin, et al.
Published: (2024)

Modeling and Simulation Frameworks for Processing-in-Memory Architectures
by: Aghaei, Mahdi, et al.
Published: (2025)

$R^4$: A Racetrack Register File with Runtime Software Reconfiguration
by: Hakert, Christian, et al.
Published: (2025)

A Novel Low-Power Cache Architecture Based on 6-Transistor SRAM Cells
by: Dizabadi, Naser Khatti, et al.
Published: (2026)

Towards Efficient Flash Caches with Emerging NVMe Flexible Data Placement SSDs
by: Allison, Michael, et al.
Published: (2025)

Count2Multiply: Reliable In-Memory High-Radix Counting
by: de Lima, João Paulo Cardoso, et al.
Published: (2024)

Design of a 64-bit SQRT-CSLA with Reduced Area and High-Speed Applications in Low Power VLSI Circuits
by: Pallavi, CH., et al.
Published: (2024)

Toward Digital Twins in 3D IC Packaging: A Critical Review of Physics, Data, and Hybrid Architectures
by: Datta, Gourab, et al.
Published: (2026)

A Novel 8T SRAM-Based In-Memory Computing Architecture for MAC-Derived Logical Functions
by: M, Amogh K, et al.
Published: (2025)

Stoch-IMC: A Bit-Parallel Stochastic In-Memory Computing Architecture Based on STT-MRAM
by: Hajisadeghi, Amir M., et al.
Published: (2024)

High-Performance Data Mapping for BNNs on PCM-based Integrated Photonics
by: Shahroodi, Taha, et al.
Published: (2024)

Power-Area Efficient Serial IMPLY-based 4:2 Compressor Applied in Data-Intensive Applications
by: Bagheralmoosavi, Bahareh, et al.
Published: (2024)

A Reconfigurable Time-Domain In-Memory Computing Macro using FeFET-Based CAM with Multilevel Delay Calibration in 28 nm CMOS
by: Mattar, Jeries, et al.
Published: (2025)

NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors
by: Nair, Harideep, et al.
Published: (2024)

Monolithic 3D Integration for Null Convention Logic (NCL)-Based Asynchronous Circuits
by: Zhang, Xiameng, et al.
Published: (2026)

CQ-CiM: Hardware-Aware Embedding Shaping for Robust CiM-Based Retrieval
by: Li, Xinzhao, et al.
Published: (2026)

ReCross: Efficient Embedding Reduction Scheme for In-Memory Computing using ReRAM-Based Crossbar
by: Lai, Yu-Hong, et al.
Published: (2025)

Scattering-Matrix-Based Parametric Characterization of a Two-Port Bridged-T Network for Microstrip Filter Applications
by: Dizabadi, Naser Khatti, et al.
Published: (2026)

I/O Transit Caching for PMem-based Block Device
by: Xu, Qing, et al.
Published: (2024)

Investigating the Effect of Electrical and Thermal Transport Properties on Oxide-Based Memristors Performance and Reliability
by: Gooran-Shoorakchaly, Armin, et al.
Published: (2024)

A wave-geometric duality for hyperdimensional computing
by: Poore, Tyler L.
Published: (2026)

Towards Memory Specialization: A Case for Long-Term and Short-Term RAM
by: Li, Peijing, et al.
Published: (2025)

Cognition Engines: A Row-Scale HVDC Architecture for Computational Continuity of AI
by: Churnock, Paul
Published: (2025)

ICGMM: CXL-enabled Memory Expansion with Intelligent Caching Using Gaussian Mixture Model
by: Chen, Hanqiu, et al.
Published: (2024)

ARMAN: A Reconfigurable Monolithic 3D Accelerator Architecture for Convolutional Neural Networks
by: Sedaghatgoo, Ali, et al.
Published: (2024)

Evaluating Computing Platforms for Sustainability: A Comparative Analysis of FPGAs against ASICs, GPUs, and CPUs
by: Sudarshan, Chetan Choppali, et al.
Published: (2026)

HiSEP-Q: A Highly Scalable and Efficient Quantum Control Processor for Superconducting Qubits
by: Guo, Xiaorang, et al.
Published: (2023)

CXL-DMSim: A Full-System CXL Disaggregated Memory Simulator With Comprehensive Silicon Validation
by: Wang, Yanjing, et al.
Published: (2024)

MPAI: A Co-Processing Architecture with MPSoC & AI Accelerators for Vision Applications in Space
by: Leon, Vasileios, et al.
Published: (2024)

A Novel Thermal Network Model and Electro-Thermal Coupling Study for NSFETs and CFETs Considering Thermal Crosstalk
by: Miao, Tianci, et al.
Published: (2025)

H3PIMAP: A Heterogeneity-Aware Multi-Objective DNN Mapping Framework on Electronic-Photonic Processing-in-Memory Architectures
by: Yin, Ziang, et al.
Published: (2025)

SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum-Flux-Parametron Superconducting Circuits
by: Xie, Yanyue, et al.
Published: (2024)

A 5T-2MTJ STT-assisted Spin Orbit Torque based Ternary Content Addressable Memory for Hardware Accelerators
by: Narla, Siri, et al.
Published: (2024)

SKYLIGHT: A Scalable Hundred-Channel 3D Photonic In-Memory Tensor Core Architecture for Real-time AI Inference
by: Zhang, Meng, et al.
Published: (2026)

PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
by: Chen, Zhiyu, et al.
Published: (2024)

Length-Matching Routing for Programmable Photonic Circuits Using Best-First Strategy
by: Wang, Xiaoke, et al.
Published: (2025)