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Hardware-Algorithm Co-Optimization of Early-Exit Neural Networks for Multi-Core Edge Accelerators

Fuente: arXiv

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Détails bibliographiques
Auteurs principaux:	Zniber, Alaa, Symons, Arne, Karrakchou, Ouassim, Verhelst, Marian, Ghogho, Mounir
Format:	Preprint
Publié:	2025
Sujets:	Computational Complexity Hardware Architecture Computer Vision and Pattern Recognition
Accès en ligne:	Acceder al recurso
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