Imagen de Portada

Functional Stability of Software-Hardware Neural Network Implementation The NeuroComp Project

Fuente: arXiv

Guardado en:

Detalles Bibliográficos
Autores principales:	Oleksii, Bychkov, Taras, Senysh
Formato:	Preprint
Publicado:	2025
Materias:	Hardware Architecture Neural and Evolutionary Computing
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

Ejemplares similares

HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators
por: Vaziri, Mobin, et al.
Publicado: (2024)

Hardware-Aware Model Design and Training of Silicon-based Analog Neural Networks
por: Filippeschi, Giulio, et al.
Publicado: (2025)

Hardware-Friendly Implementation of Physical Reservoir Computing with CMOS-based Time-domain Analog Spiking Neurons
por: Kimura, Nanako, et al.
Publicado: (2024)

TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Architecture and Hardware Implementation
por: Sestito, Cristian, et al.
Publicado: (2024)

YANA: Bridging the Neuromorphic Simulation-to-Hardware Gap
por: Pachideh, Brian, et al.
Publicado: (2026)

Spiking Transformer Hardware Accelerators in 3D Integration
por: Xu, Boxun, et al.
Publicado: (2024)

A Case for Hypergraphs to Model and Map SNNs on Neuromorphic Hardware
por: Ronzani, Marco, et al.
Publicado: (2026)

NeuroFlex: Column-Exact ANN-SNN Co-Execution Accelerator with Cost-Guided Scheduling
por: Manjunath, Varun, et al.
Publicado: (2025)

RAMAN: Resource-efficient ApproxiMate Posit Processing for Algorithm-Hardware Co-desigN
por: Khan, Mohd Faisal, et al.
Publicado: (2025)

A Deep Neural Network Deployment Based on Resistive Memory Accelerator Simulation
por: Maram, Tejaswanth Reddy, et al.
Publicado: (2023)

SpikeX: Exploring Accelerator Architecture and Network-Hardware Co-Optimization for Sparse Spiking Neural Networks
por: Xu, Boxun, et al.
Publicado: (2025)

A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks
por: Hafiz, Muhammad Ihsan Al, et al.
Publicado: (2025)

Wet TinyML: Chemical Neural Network Using Gene Regulation and Cell Plasticity
por: Somathilaka, Samitha, et al.
Publicado: (2024)

Catwalk: Unary Top-K for Efficient Ramp-No-Leak Neuron Design for Temporal Neural Networks
por: Lister, Devon, et al.
Publicado: (2025)

UniSpike: Accelerating Spiking Neural Networks on Neuromorphic Systems via Eliminating Address Redundancy
por: Xing, Qinghui, et al.
Publicado: (2026)

Core Placement Optimization of Many-core Brain-Inspired Near-Storage Systems for Spiking Neural Network Training
por: Zhu, Xueke, et al.
Publicado: (2024)

Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons
por: Ali, Asmer Hamid, et al.
Publicado: (2024)

SNAP-V: A RISC-V SoC with Configurable Neuromorphic Acceleration for Small-Scale Spiking Neural Networks
por: Gunawardana, Kanishka, et al.
Publicado: (2026)

Efficient Implementation of a Multi-Layer Gradient-Free Online-Trainable Spiking Neural Network on FPGA
por: Mehrabi, Ali, et al.
Publicado: (2023)

Fast Algorithms for Spiking Neural Network Simulation with FPGAs
por: Lindqvist, Björn A., et al.
Publicado: (2024)

Hybrid Synaptic Structure for Spiking Neural Network Realization
por: Razmkhah, Sasan, et al.
Publicado: (2023)

ReLANCE: A Resource-Efficient Low-Latency Cortical Neural Acceleration Engine
por: Kumar, Sonu, et al.
Publicado: (2025)

Wireless Sensor Networks as Parallel and Distributed Hardware Platform for Artificial Neural Networks
por: Serpen, Gursel
Publicado: (2025)

IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons
por: Szczerek, Wiktor J., et al.
Publicado: (2025)

NeuroNAS: Enhancing Efficiency of Neuromorphic In-Memory Computing for Intelligent Mobile Agents through Hardware-Aware Spiking Neural Architecture Search
por: Putra, Rachmad Vidya Wicaksana, et al.
Publicado: (2024)

NeuroRing: Scaling Spiking Neural Networks via Multi-FPGA Bidirectional Ring Topologies and Stream-Dataflow Architectures
por: Hafiz, Muhammad Ihsan Al, et al.
Publicado: (2026)

Embedding Hardware Approximations in Discrete Genetic-based Training for Printed MLPs
por: Afentaki, Florentia, et al.
Publicado: (2024)

A Quarter of a Century of Neuromorphic Architectures on FPGAs -- an Overview
por: Szczerek, Wiktor J., et al.
Publicado: (2025)

E2ATST: A Temporal-Spatial Optimized Energy-Efficient Architecture for Training Spiking Transformer
por: Ma, Yunhao, et al.
Publicado: (2025)

Darwin3: A large-scale neuromorphic chip with a Novel ISA and On-Chip Learning
por: Ma, De, et al.
Publicado: (2023)

Memory Wall is not gone: A Critical Outlook on Memory Architecture in Digital Neuromorphic Computing
por: Yousefzadeh, Amirreza, et al.
Publicado: (2026)

SAGA: Synthesis Augmentation with Genetic Algorithms for In-Memory Sequence Optimization
por: Robins, Andey, et al.
Publicado: (2024)

Automated Placement of Analog Integrated Circuits using Priority-based Constructive Heuristic
por: Grus, Josef, et al.
Publicado: (2024)

An Efficient Multicast Addressing Encoding Scheme for Multi-Core Neuromorphic Processors
por: Su, Zhe, et al.
Publicado: (2024)

FlexNN: A Dataflow-aware Flexible Deep Learning Accelerator for Energy-Efficient Edge Devices
por: Raha, Arnab, et al.
Publicado: (2024)

Variability-Aware Approximate Circuit Synthesis via Genetic Optimization
por: Balaskas, Konstantinos, et al.
Publicado: (2023)

A 0.5-V Linear Neuromorphic Voltage-to-Spike Encoder Using a Bulk-Driven Transconductor
por: Akbari, Meysam, et al.
Publicado: (2026)

Flexi-NeurA: A Configurable Neuromorphic Accelerator with Adaptive Bit-Precision Exploration for Edge SNNs
por: Farahani, Mohammad, et al.
Publicado: (2026)

Reducing ADC Front-end Costs During Training of On-sensor Printed Multilayer Perceptrons
por: Afentaki, Florentia, et al.
Publicado: (2024)

EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration
por: Zhang, Haoyi, et al.
Publicado: (2024)