A 33.6-136.2 TOPS/W Nonlinear Analog Computing-In-Memory Macro for Multi-bit LSTM Accelerator in 65 nm CMOS

Fuente: arXiv

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Bibliographic Details
Main Authors:	Yang, Junyi, Luo, Xinyu, Ke, Ye, Wang, Zheng, Shang, Hongyang, Dong, Shuai, Fu, Zhengnan, Yang, Xiaofeng, Liu, Hongjie, Basu, Arindam
Format:	Preprint
Published:	2025
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
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Internet

https://arxiv.org/abs/2512.06362