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A 33.6-136.2 TOPS/W Nonlinear Analog Computing-In-Memory Macro for Multi-bit LSTM Accelerator in 65 nm CMOS

Fuente: arXiv

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Dettagli Bibliografici
Autori principali:	Yang, Junyi, Luo, Xinyu, Ke, Ye, Wang, Zheng, Shang, Hongyang, Dong, Shuai, Fu, Zhengnan, Yang, Xiaofeng, Liu, Hongjie, Basu, Arindam
Natura:	Preprint
Pubblicazione:	2025
Soggetti:	Hardware Architecture
Accesso online:	Acceder al recurso
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