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Bibliographic Details
Main Authors: N, Amogh Anshu, BP, Harish
Format: Preprint
Published: 2025
Subjects:
Online Access:https://arxiv.org/abs/2512.07877
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author N, Amogh Anshu
BP, Harish
author_facet N, Amogh Anshu
BP, Harish
contents Network-on-Chip (NoC) design requires exploring a high-dimensional configuration space to satisfy stringent throughput requirements and latency constraints. Traditional design space exploration techniques are often slow and struggle to handle complex, non-linear parameter interactions. This work presents a machine learning-driven framework that automates NoC design space exploration using BookSim simulations and reverse neural network models. Specifically, we compare three architectures - a Multi-Layer Perceptron (MLP),a Conditional Diffusion Model, and a Conditional Variational Autoencoder (CVAE) to predict optimal NoC parameters given target performance metrics. Our pipeline generates over 150,000 simulation data points across varied mesh topologies. The Conditional Diffusion Model achieved the highest predictive accuracy, attaining a mean squared error (MSE) of 0.463 on unseen data. Furthermore, the proposed framework reduces design exploration time by several orders of magnitude, making it a practical solution for rapid and scalable NoC co-design.
format Preprint
id arxiv_https___arxiv_org_abs_2512_07877
institution arXiv
publishDate 2025
record_format arxiv
spellingShingle Artificial Intelligence-Driven Network-on-Chip Design Space Exploration: Neural Network Architectures for Design
N, Amogh Anshu
BP, Harish
Machine Learning
Artificial Intelligence
Network-on-Chip (NoC) design requires exploring a high-dimensional configuration space to satisfy stringent throughput requirements and latency constraints. Traditional design space exploration techniques are often slow and struggle to handle complex, non-linear parameter interactions. This work presents a machine learning-driven framework that automates NoC design space exploration using BookSim simulations and reverse neural network models. Specifically, we compare three architectures - a Multi-Layer Perceptron (MLP),a Conditional Diffusion Model, and a Conditional Variational Autoencoder (CVAE) to predict optimal NoC parameters given target performance metrics. Our pipeline generates over 150,000 simulation data points across varied mesh topologies. The Conditional Diffusion Model achieved the highest predictive accuracy, attaining a mean squared error (MSE) of 0.463 on unseen data. Furthermore, the proposed framework reduces design exploration time by several orders of magnitude, making it a practical solution for rapid and scalable NoC co-design.
title Artificial Intelligence-Driven Network-on-Chip Design Space Exploration: Neural Network Architectures for Design
topic Machine Learning
Artificial Intelligence
url https://arxiv.org/abs/2512.07877