Sherry: Hardware-Efficient 1.25-Bit Ternary Quantization via Fine-grained Sparsification
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| Format: | Preprint |
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2026
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| _version_ | 1866917198428110848 |
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| author | Huang, Hong Wu, Decheng Hu, Qiangqiang Yu, Guanghua Yang, Jinhai Zhu, Jianchen Liu, Xue Wu, Dapeng |
| author_facet | Huang, Hong Wu, Decheng Hu, Qiangqiang Yu, Guanghua Yang, Jinhai Zhu, Jianchen Liu, Xue Wu, Dapeng |
| contents | The deployment of Large Language Models (LLMs) on resource-constrained edge devices is increasingly hindered by prohibitive memory and computational requirements. While ternary quantization offers a compelling solution by reducing weights to {-1, 0, +1}, current implementations suffer from a fundamental misalignment with commodity hardware. Most existing methods must choose between 2-bit aligned packing, which incurs significant bit wastage, or 1.67-bit irregular packing, which degrades inference speed. To resolve this tension, we propose Sherry, a hardware-efficient ternary quantization framework. Sherry introduces a 3:4 fine-grained sparsity that achieves a regularized 1.25-bit width by packing blocks of four weights into five bits, restoring power-of-two alignment. Furthermore, we identify weight trapping issue in sparse ternary training, which leads to representational collapse. To address this, Sherry introduces Arenas, an annealing residual synapse mechanism that maintains representational diversity during training. Empirical evaluations on LLaMA-3.2 across five benchmarks demonstrate that Sherry matches state-of-the-art ternary performance while significantly reducing model size. Notably, on an Intel i7-14700HX CPU, our 1B model achieves zero accuracy loss compared to SOTA baselines while providing 25% bit savings and 10% speed up. The code is available at https://github.com/Tencent/AngelSlim . |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2601_07892 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Sherry: Hardware-Efficient 1.25-Bit Ternary Quantization via Fine-grained Sparsification Huang, Hong Wu, Decheng Hu, Qiangqiang Yu, Guanghua Yang, Jinhai Zhu, Jianchen Liu, Xue Wu, Dapeng Machine Learning Artificial Intelligence The deployment of Large Language Models (LLMs) on resource-constrained edge devices is increasingly hindered by prohibitive memory and computational requirements. While ternary quantization offers a compelling solution by reducing weights to {-1, 0, +1}, current implementations suffer from a fundamental misalignment with commodity hardware. Most existing methods must choose between 2-bit aligned packing, which incurs significant bit wastage, or 1.67-bit irregular packing, which degrades inference speed. To resolve this tension, we propose Sherry, a hardware-efficient ternary quantization framework. Sherry introduces a 3:4 fine-grained sparsity that achieves a regularized 1.25-bit width by packing blocks of four weights into five bits, restoring power-of-two alignment. Furthermore, we identify weight trapping issue in sparse ternary training, which leads to representational collapse. To address this, Sherry introduces Arenas, an annealing residual synapse mechanism that maintains representational diversity during training. Empirical evaluations on LLaMA-3.2 across five benchmarks demonstrate that Sherry matches state-of-the-art ternary performance while significantly reducing model size. Notably, on an Intel i7-14700HX CPU, our 1B model achieves zero accuracy loss compared to SOTA baselines while providing 25% bit savings and 10% speed up. The code is available at https://github.com/Tencent/AngelSlim . |
| title | Sherry: Hardware-Efficient 1.25-Bit Ternary Quantization via Fine-grained Sparsification |
| topic | Machine Learning Artificial Intelligence |
| url | https://arxiv.org/abs/2601.07892 |