Bio-RV: Low-Power Resource-Efficient RISC-V Processor for Biomedical Applications
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arXiv
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| Autores principales: | , , , , |
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| Formato: | Preprint |
| Publicado: |
2026
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| _version_ | 1866911575561994240 |
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| author | Sharma, Vijay Pratap Kumar, Annu Khan, Mohd Faisal Lokhande, Mukul Vishvakarma, Santosh Kumar |
| author_facet | Sharma, Vijay Pratap Kumar, Annu Khan, Mohd Faisal Lokhande, Mukul Vishvakarma, Santosh Kumar |
| contents | This work presents Bio-RV, a compact and resource-efficient RISC-V processor intended for biomedical control applications, such as accelerator-based biomedical SoCs and implantable pacemaker systems. The proposed Bio-RV is a multi-cycle RV32I core that provides explicit execution control and external instruction loading with capabilities that enable controlled firmware deployment, ASIC bring-up, and post-silicon testing. In addition to coordinating accelerator configuration and data transmission in heterogeneous systems, Bio-RV is designed to function as a lightweight host controller, handling interfaces with pacing, sensing, electrogram (EGM), telemetry, and battery management modules. With 708 LUTs and 235 flip-flops on FPGA prototypes, Bio-RV, implemented in a 180 nm CMOS technology, operate at 50 MHz and feature a compact hardware footprint. According to post-layout results, the proposed architectural decisions align with minimal energy use. Ultimately, Bio-RV prioritises deterministic execution, minimal hardware complexity, and integration flexibility over peak computing speed to meet the demands of ultra-low-power, safety-critical biomedical systems. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2601_08428 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Bio-RV: Low-Power Resource-Efficient RISC-V Processor for Biomedical Applications Sharma, Vijay Pratap Kumar, Annu Khan, Mohd Faisal Lokhande, Mukul Vishvakarma, Santosh Kumar Signal Processing Hardware Architecture This work presents Bio-RV, a compact and resource-efficient RISC-V processor intended for biomedical control applications, such as accelerator-based biomedical SoCs and implantable pacemaker systems. The proposed Bio-RV is a multi-cycle RV32I core that provides explicit execution control and external instruction loading with capabilities that enable controlled firmware deployment, ASIC bring-up, and post-silicon testing. In addition to coordinating accelerator configuration and data transmission in heterogeneous systems, Bio-RV is designed to function as a lightweight host controller, handling interfaces with pacing, sensing, electrogram (EGM), telemetry, and battery management modules. With 708 LUTs and 235 flip-flops on FPGA prototypes, Bio-RV, implemented in a 180 nm CMOS technology, operate at 50 MHz and feature a compact hardware footprint. According to post-layout results, the proposed architectural decisions align with minimal energy use. Ultimately, Bio-RV prioritises deterministic execution, minimal hardware complexity, and integration flexibility over peak computing speed to meet the demands of ultra-low-power, safety-critical biomedical systems. |
| title | Bio-RV: Low-Power Resource-Efficient RISC-V Processor for Biomedical Applications |
| topic | Signal Processing Hardware Architecture |
| url | https://arxiv.org/abs/2601.08428 |