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Main Authors: Aczel, Till, Jenny, David F., Bührer, Simon, Plesner, Andreas, Di Maio, Antonio, Wattenhofer, Roger
Format: Preprint
Published: 2026
Subjects:
Online Access:https://arxiv.org/abs/2601.14130
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_version_ 1866914266475397120
author Aczel, Till
Jenny, David F.
Bührer, Simon
Plesner, Andreas
Di Maio, Antonio
Wattenhofer, Roger
author_facet Aczel, Till
Jenny, David F.
Bührer, Simon
Plesner, Andreas
Di Maio, Antonio
Wattenhofer, Roger
contents Neural image codecs achieve higher compression ratios than traditional hand-crafted methods such as PNG or JPEG-XL, but often incur substantial computational overhead, limiting their deployment on energy-constrained devices such as smartphones, cameras, and drones. We propose Grayscale Image Compression with Differentiable Logic Circuits (GIC-DLC), a hardware-aware codec where we train lookup tables to combine the flexibility of neural networks with the efficiency of Boolean operations. Experiments on grayscale benchmark datasets show that GIC-DLC outperforms traditional codecs in compression efficiency while allowing substantial reductions in energy consumption and latency. These results demonstrate that learned compression can be hardware-friendly, offering a promising direction for low-power image compression on edge devices.
format Preprint
id arxiv_https___arxiv_org_abs_2601_14130
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle GIC-DLC: Differentiable Logic Circuits for Hardware-Friendly Grayscale Image Compression
Aczel, Till
Jenny, David F.
Bührer, Simon
Plesner, Andreas
Di Maio, Antonio
Wattenhofer, Roger
Computer Vision and Pattern Recognition
Neural image codecs achieve higher compression ratios than traditional hand-crafted methods such as PNG or JPEG-XL, but often incur substantial computational overhead, limiting their deployment on energy-constrained devices such as smartphones, cameras, and drones. We propose Grayscale Image Compression with Differentiable Logic Circuits (GIC-DLC), a hardware-aware codec where we train lookup tables to combine the flexibility of neural networks with the efficiency of Boolean operations. Experiments on grayscale benchmark datasets show that GIC-DLC outperforms traditional codecs in compression efficiency while allowing substantial reductions in energy consumption and latency. These results demonstrate that learned compression can be hardware-friendly, offering a promising direction for low-power image compression on edge devices.
title GIC-DLC: Differentiable Logic Circuits for Hardware-Friendly Grayscale Image Compression
topic Computer Vision and Pattern Recognition
url https://arxiv.org/abs/2601.14130