Analog-to-Stochastic Converter Using Magnetic Tunnel Junction Devices for Vision Chips

Fuente: arXiv
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Autori principali: Onizawa, Naoya, Katagiri, Daisaku, Gross, Warren J., Hanyu, Takahiro
Natura: Preprint
Pubblicazione: 2026
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author Onizawa, Naoya
Katagiri, Daisaku
Gross, Warren J.
Hanyu, Takahiro
author_facet Onizawa, Naoya
Katagiri, Daisaku
Gross, Warren J.
Hanyu, Takahiro
contents This paper introduces an analog-to-stochastic converter using a magnetic tunnel junction (MTJ) device for vision chips based on stochastic computation. Stochastic computation has been recently exploited for area-efficient hardware implementation, such as low-density parity-check (LDPC) decoders and image processors. However, power-and-area hungry two-step (analog-to-digital and digital-to-stochastic) converters are required for the analog to stochastic signal conversion. To realize a one-step conversion, an MTJ device is used as it inherently exhibits a probabilistic switching behavior between two resistance states. Exploiting the device-based probabilistic behavior, analog signals can be directly and area-efficiently converted to stochastic signals to mitigate the signal-conversion overhead. The analog-to-stochastic signal conversion is theoretically described and the conversion characteristic is evaluated using device and circuit parameters. In addition, the resistance variability of the MTJ device is considered in order to compensate the variability effect on the signal conversion. Based on the theoretical analysis, the analog-to-stochastic converter is designed in 90nm CMOS and 100nm MTJ technologies and is verified using a SPICE simulator (NS-SPICE) that handles both transistors and MTJ devices.
format Preprint
id arxiv_https___arxiv_org_abs_2601_14640
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle Analog-to-Stochastic Converter Using Magnetic Tunnel Junction Devices for Vision Chips
Onizawa, Naoya
Katagiri, Daisaku
Gross, Warren J.
Hanyu, Takahiro
Emerging Technologies
Hardware Architecture
This paper introduces an analog-to-stochastic converter using a magnetic tunnel junction (MTJ) device for vision chips based on stochastic computation. Stochastic computation has been recently exploited for area-efficient hardware implementation, such as low-density parity-check (LDPC) decoders and image processors. However, power-and-area hungry two-step (analog-to-digital and digital-to-stochastic) converters are required for the analog to stochastic signal conversion. To realize a one-step conversion, an MTJ device is used as it inherently exhibits a probabilistic switching behavior between two resistance states. Exploiting the device-based probabilistic behavior, analog signals can be directly and area-efficiently converted to stochastic signals to mitigate the signal-conversion overhead. The analog-to-stochastic signal conversion is theoretically described and the conversion characteristic is evaluated using device and circuit parameters. In addition, the resistance variability of the MTJ device is considered in order to compensate the variability effect on the signal conversion. Based on the theoretical analysis, the analog-to-stochastic converter is designed in 90nm CMOS and 100nm MTJ technologies and is verified using a SPICE simulator (NS-SPICE) that handles both transistors and MTJ devices.
title Analog-to-Stochastic Converter Using Magnetic Tunnel Junction Devices for Vision Chips
topic Emerging Technologies
Hardware Architecture
url https://arxiv.org/abs/2601.14640