Imagen de Portada

From Fuzzy to Exact: The Halo Architecture for Infinite-Depth Reasoning via Rational Arithmetic

Fuente: arXiv

Guardado en:

Detalles Bibliográficos
Autor principal:	Ren, Hansheng
Formato:	Preprint
Publicado:	2026
Materias:	Machine Learning Artificial Intelligence Hardware Architecture
Acceso en línea:	Acceder al recurso
Etiquetas:	Agregar Etiqueta Sin Etiquetas, Sea el primero en etiquetar este registro!

Ejemplares similares

CacheMind: From Miss Rates to Why -- Natural-Language, Trace-Grounded Reasoning for Cache Replacement
por: Mhapsekar, Kaushal, et al.
Publicado: (2026)

Dynamic Sparse Attention: Access Patterns and Architecture
por: Levy, Noam
Publicado: (2026)

The Role of Advanced Computer Architectures in Accelerating Artificial Intelligence Workloads
por: Amin, Shahid, et al.
Publicado: (2025)

QuArch: A Question-Answering Dataset for AI Agents in Computer Architecture
por: Prakash, Shvetank, et al.
Publicado: (2025)

VUSA: Virtually Upscaled Systolic Array Architecture to Exploit Unstructured Sparsity in AI Acceleration
por: Helal, Shereef, et al.
Publicado: (2025)

MEMHD: Memory-Efficient Multi-Centroid Hyperdimensional Computing for Fully-Utilized In-Memory Computing Architectures
por: Kang, Do Yeong, et al.
Publicado: (2025)

HDReason: Algorithm-Hardware Codesign for Hyperdimensional Knowledge Graph Reasoning
por: Chen, Hanning, et al.
Publicado: (2024)

AIM: Software and Hardware Co-design for Architecture-level IR-drop Mitigation in High-performance PIM
por: Zhang, Yuanpeng, et al.
Publicado: (2025)

tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI
por: Nair, Harideep, et al.
Publicado: (2024)

QuArch: A Benchmark for Evaluating LLM Reasoning in Computer Architecture
por: Prakash, Shvetank, et al.
Publicado: (2025)

AnaFlow: Agentic LLM-based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizing
por: Ahmadzadeh, Mohsen, et al.
Publicado: (2025)

Position Paper: From Edge AI to Adaptive Edge AI
por: Pittorino, Fabrizio, et al.
Publicado: (2026)

BoolGebra: Attributed Graph-learning for Boolean Algebraic Manipulation
por: Li, Yingjie, et al.
Publicado: (2024)

Automated and Holistic Co-design of Neural Networks and ASICs for Enabling In-Pixel Intelligence
por: Kharel, Shubha R., et al.
Publicado: (2024)

Automated Design and Optimization of Distributed Filtering Circuits via Reinforcement Learning
por: Gao, Peng, et al.
Publicado: (2024)

Learning to Compare Hardware Designs for High-Level Synthesis
por: Bai, Yunsheng, et al.
Publicado: (2024)

TransPlace: Transferable Circuit Global Placement via Graph Neural Network
por: Hou, Yunbo, et al.
Publicado: (2025)

MonoSparse-CAM: Efficient Tree Model Processing via Monotonicity and Sparsity in CAMs
por: Molom-Ochir, Tergel, et al.
Publicado: (2024)

GENIAL: Generative Design Space Exploration via Network Inversion for Low Power Algorithmic Logic Units
por: Bouvier, Maxence, et al.
Publicado: (2025)

NSFlow: An End-to-End FPGA Framework with Scalable Dataflow Architecture for Neuro-Symbolic AI
por: Yang, Hanchen, et al.
Publicado: (2025)

Accelerating LLM Inference with Flexible N:M Sparsity via A Fully Digital Compute-in-Memory Accelerator
por: Ramachandran, Akshat, et al.
Publicado: (2025)

LayerPipe2: Multistage Pipelining and Weight Recompute via Improved Exponential Moving Average for Training Neural Networks
por: Unnikrishnan, Nanda K., et al.
Publicado: (2025)

Multimodal Chip Physical Design Engineer Assistant
por: Tsai, Yun-Da, et al.
Publicado: (2025)

ChipExpert: The Open-Source Integrated-Circuit-Design-Specific Large Language Model
por: Xu, Ning, et al.
Publicado: (2024)

VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation
por: Wang, Yiting, et al.
Publicado: (2025)

In-Memory Learning Automata Architecture using Y-Flash Cell
por: Ghazal, Omar, et al.
Publicado: (2024)

FlexLLM: Composable HLS Library for Flexible Hybrid LLM Accelerator Design
por: Zhang, Jiahao, et al.
Publicado: (2026)

Causal AI For AMS Circuit Design: Interpretable Parameter Effects Analysis
por: Hussain, Mohyeu, et al.
Publicado: (2026)

Design Rules for Extreme-Edge Scientific Computing on AI Engines
por: Ma, Zhenghua, et al.
Publicado: (2026)

Hybrid JIT-CUDA Graph Optimization for Low-Latency Large Language Model Inference
por: Yadav, Divakar Kumar, et al.
Publicado: (2026)

Agent Factories for High Level Synthesis: How Far Can General-Purpose Coding Agents Go in Hardware Optimization?
por: Bhandwaldar, Abhishek, et al.
Publicado: (2026)

TRAM: Training Approximate Multiplier Structures for Low-Power AI Accelerators
por: Meng, Chang, et al.
Publicado: (2026)

Graph Computation Meets Circuit Algebra: A Task-Aligned Analysis of Graph Neural Networks for Electronic Design Automation
por: Kim, Hyunmog
Publicado: (2026)

ALADIN: Accuracy-Latency-Aware Design-space Inference Analysis for Embedded AI Accelerators
por: Baldi, T., et al.
Publicado: (2026)

Challenges and Research Directions for Large Language Model Inference Hardware
por: Ma, Xiaoyu, et al.
Publicado: (2026)

Improving the Performance and Learning Stability of Parallelizable RNNs Designed for Ultra-Low Power Applications
por: Brandoit, Julien, et al.
Publicado: (2026)

Differentiable Initialization-Accelerated CPU-GPU Hybrid Combinatorial Scheduling
por: Liu, Mingju, et al.
Publicado: (2026)

Hardware Efficient Approximate Convolution with Tunable Error Tolerance for CNNs
por: Shashidhar, Vishal, et al.
Publicado: (2026)

FASQ: Flexible Accelerated Subspace Quantization for Calibration-Free LLM Compression
por: Qiao, Ye, et al.
Publicado: (2026)

SPARQ: Spiking Early-Exit Neural Networks for Energy-Efficient Edge AI
por: Patne, Parth, et al.
Publicado: (2026)