A Time-Domain Dual-Edge Asynchronous Pipelined SAR ADC Featuring Reset-Free Quantization at Multi-GS/s

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Zeng, Richard, Carusone, Anthony Chan, Liu, Xilin
Format:	Preprint
Published:	2026
Subjects:	Signal Processing Systems and Control
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Internet

https://arxiv.org/abs/2601.21308