A biased-erasure cavity qubit with hardware-efficient quantum error detection
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arXiv
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| Main Authors: | , , , , , , , , , , |
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| Format: | Preprint |
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2026
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| _version_ | 1866917231453011968 |
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| author | Mai, Jiasheng Liu, Qiyu Deng, Xiaowei Cai, Yanyan Ni, Zhongchu Zhang, Libo Hu, Ling Zheng, Pan Liu, Song Xu, Yuan Yu, Dapeng |
| author_facet | Mai, Jiasheng Liu, Qiyu Deng, Xiaowei Cai, Yanyan Ni, Zhongchu Zhang, Libo Hu, Ling Zheng, Pan Liu, Song Xu, Yuan Yu, Dapeng |
| contents | Erasure qubits are beneficial for quantum error correction due to their relaxed threshold requirements. While dual-rail erasure qubits have been demonstrated with a strong error hierarchy in circuit quantum electrodynamics, biased-erasure qubits -- where erasures originate predominantly from one logical basis state -- offer further advantages. Here, we realize a hardware-efficient biased-erasure qubit encoded in the vacuum and two-photon Fock states of a single microwave cavity. The qubit exhibits an erasure bias ratio of over 265. By using a transmon ancilla for logical measurements and mid-circuit erasure detections, we achieve logical state assignment errors below 1% and convert over 99.3% leakage errors into detected erasures. After postselection against erasures, we achieve effective logical relaxation and dephasing rates of $(6.2~\mathrm{ms})^{-1}$ and $(3.1~\mathrm{ms})^{-1}$, respectively, which exceed the erasure error rate by factors of 31 and 15, establishing a strong error hierarchy within the logical subspace. These postselected error rates indicate a coherence gain of about 6.0 beyond the break-even point set by the best physical qubit encoded in the two lowest Fock states in the cavity. Moreover, randomized benchmarking with interleaved erasure detections reveals a residual logical gate error of 0.29%. This work establishes a compact and hardware-efficient platform for biased-erasure qubits, promising concatenations into outer-level stabilizer codes toward fault-tolerant quantum computation. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2601_21616 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | A biased-erasure cavity qubit with hardware-efficient quantum error detection Mai, Jiasheng Liu, Qiyu Deng, Xiaowei Cai, Yanyan Ni, Zhongchu Zhang, Libo Hu, Ling Zheng, Pan Liu, Song Xu, Yuan Yu, Dapeng Quantum Physics Erasure qubits are beneficial for quantum error correction due to their relaxed threshold requirements. While dual-rail erasure qubits have been demonstrated with a strong error hierarchy in circuit quantum electrodynamics, biased-erasure qubits -- where erasures originate predominantly from one logical basis state -- offer further advantages. Here, we realize a hardware-efficient biased-erasure qubit encoded in the vacuum and two-photon Fock states of a single microwave cavity. The qubit exhibits an erasure bias ratio of over 265. By using a transmon ancilla for logical measurements and mid-circuit erasure detections, we achieve logical state assignment errors below 1% and convert over 99.3% leakage errors into detected erasures. After postselection against erasures, we achieve effective logical relaxation and dephasing rates of $(6.2~\mathrm{ms})^{-1}$ and $(3.1~\mathrm{ms})^{-1}$, respectively, which exceed the erasure error rate by factors of 31 and 15, establishing a strong error hierarchy within the logical subspace. These postselected error rates indicate a coherence gain of about 6.0 beyond the break-even point set by the best physical qubit encoded in the two lowest Fock states in the cavity. Moreover, randomized benchmarking with interleaved erasure detections reveals a residual logical gate error of 0.29%. This work establishes a compact and hardware-efficient platform for biased-erasure qubits, promising concatenations into outer-level stabilizer codes toward fault-tolerant quantum computation. |
| title | A biased-erasure cavity qubit with hardware-efficient quantum error detection |
| topic | Quantum Physics |
| url | https://arxiv.org/abs/2601.21616 |