Optimal Software Pipelining using an SMT-Solver
Fuente:
arXiv
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| Autore principale: | |
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| Natura: | Preprint |
| Pubblicazione: |
2026
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| _version_ | 1866917234417336320 |
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| author | Roorda, Jan-Willem |
| author_facet | Roorda, Jan-Willem |
| contents | Software Pipelining is a classic and important loop-optimization for VLIW processors. It improves instruction-level parallelism by overlapping multiple iterations of a loop and executing them in parallel. Typically, it is implemented using heuristics. In this paper, we present an optimal software pipeliner based on a Satisfiability Modulo Theories (SMT) Solver. We show that our approach significantly outperforms heuristic algorithms and hand-optimization. Furthermore, we show how the solver can be used to give feedback to programmers and processor designers on why a software pipelined schedule of a certain initiation interval is not feasible. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2601_21842 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Optimal Software Pipelining using an SMT-Solver Roorda, Jan-Willem Programming Languages 68N20 D.3.4; C.1.1 Software Pipelining is a classic and important loop-optimization for VLIW processors. It improves instruction-level parallelism by overlapping multiple iterations of a loop and executing them in parallel. Typically, it is implemented using heuristics. In this paper, we present an optimal software pipeliner based on a Satisfiability Modulo Theories (SMT) Solver. We show that our approach significantly outperforms heuristic algorithms and hand-optimization. Furthermore, we show how the solver can be used to give feedback to programmers and processor designers on why a software pipelined schedule of a certain initiation interval is not feasible. |
| title | Optimal Software Pipelining using an SMT-Solver |
| topic | Programming Languages 68N20 D.3.4; C.1.1 |
| url | https://arxiv.org/abs/2601.21842 |