SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence
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arXiv
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| Main Authors: | , , , , |
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| Format: | Preprint |
| Published: |
2026
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| _version_ | 1866917232939892736 |
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| author | Aldowaish, Saoud Karumanchi, Yashwanth Chiang, Kai-Chen Noorzad, Soroosh Fayazi, Morteza |
| author_facet | Aldowaish, Saoud Karumanchi, Yashwanth Chiang, Kai-Chen Noorzad, Soroosh Fayazi, Morteza |
| contents | Current methods for converting circuit schematic images into machine-readable netlists struggle with component recognition and connectivity inference. In this paper, we present SINA, an open-source, fully automated circuit schematic image-to-netlist generator. SINA integrates deep learning for accurate component detection, Connected-Component Labeling (CCL) for precise connectivity extraction, and Optical Character Recognition (OCR) for component reference designator retrieval, while employing a Vision-Language Model (VLM) for reliable reference designator assignments. In our experiments, SINA achieves 96.47% overall netlist-generation accuracy, which is 2.72x higher than state-of-the-art approaches. |
| format | Preprint |
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arxiv_https___arxiv_org_abs_2601_22114 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence Aldowaish, Saoud Karumanchi, Yashwanth Chiang, Kai-Chen Noorzad, Soroosh Fayazi, Morteza Computer Vision and Pattern Recognition Artificial Intelligence Systems and Control Current methods for converting circuit schematic images into machine-readable netlists struggle with component recognition and connectivity inference. In this paper, we present SINA, an open-source, fully automated circuit schematic image-to-netlist generator. SINA integrates deep learning for accurate component detection, Connected-Component Labeling (CCL) for precise connectivity extraction, and Optical Character Recognition (OCR) for component reference designator retrieval, while employing a Vision-Language Model (VLM) for reliable reference designator assignments. In our experiments, SINA achieves 96.47% overall netlist-generation accuracy, which is 2.72x higher than state-of-the-art approaches. |
| title | SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence |
| topic | Computer Vision and Pattern Recognition Artificial Intelligence Systems and Control |
| url | https://arxiv.org/abs/2601.22114 |