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Optimizing Tensor Train Decomposition in DNNs for RISC-V Architectures Using Design Space Exploration and Compiler Optimizations

Fuente: arXiv

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Détails bibliographiques
Auteurs principaux:	Anthimopoulos, Theologos, Kokhazadeh, Milad, Kelefouras, Vasilios, Himpel, Benjamin, Keramidas, Georgios
Format:	Preprint
Publié:	2026
Sujets:	Machine Learning Artificial Intelligence Hardware Architecture Mathematical Software 15A69, 68T07 C.3; G.1.3; D.3.4
Accès en ligne:	Acceder al recurso
Tags:	Ajouter un tag Pas de tags, Soyez le premier à ajouter un tag!

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