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| Main Authors: | , , , , , , , , , , , , , , , , , , , |
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| Format: | Preprint |
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2026
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2602.07424 |
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| _version_ | 1866918343534968832 |
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| author | Xing, Kaijian Yang, Zherui Zhao, Weiyao Yin, Yuefeng Han, Huiping Wang, Shanhu Wang, Shifan Bullock, James Stacey, Alastair Belcourt, James A. Rubanov, Sergey Yin, Hang Broadway, David A. Tetienne, Jean-Philippe Yin, Xinmao Wu, Liang Qi, Dong-Chen Fuhrer, Michael S. Ou, Qingdong Wang, Xiao Renshaw |
| author_facet | Xing, Kaijian Yang, Zherui Zhao, Weiyao Yin, Yuefeng Han, Huiping Wang, Shanhu Wang, Shifan Bullock, James Stacey, Alastair Belcourt, James A. Rubanov, Sergey Yin, Hang Broadway, David A. Tetienne, Jean-Philippe Yin, Xinmao Wu, Liang Qi, Dong-Chen Fuhrer, Michael S. Ou, Qingdong Wang, Xiao Renshaw |
| contents | The p-type transistor is an indispensable component of semiconductor technology, enabling complementary operation with n-channel transistors for computation, storage, and communication. Achieving both high robustness and high efficiency is highly desirable but challenging for p-type transistors due to limited semiconductors with reliable hole transport and their high activation energies. Here, we achieved a robust yet efficient p-type transistor by heterogeneously integrating an ultra-wide-bandgap semiconductor and a high-k dielectric layer through van der Waals integration. The p-type transistor employs a two-dimensional hole channel on hydrogenated diamond (bandgap 5.6 eV) combined with a high-k (30.5) SrTiO3 perovskite membrane. At room temperature, the transistor exhibits stable operation with a high on-current (~200 mA/mm), low subthreshold swing (70 mV/dec), high hole mobility (566 cm^2/Vs to 572 cm^2/Vs) and high on-off ratio (~10^9). Furthermore, tuning annealing temperature allows operation in either enhancement or depletion mode. The robust p-type transistor with high efficiency holds great potential for future power electronics, UV optoelectronics, and harsh-environment electronic applications. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2602_07424 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Efficient and Robust p-type Transistor based on Ultra-wide-bandgap Semiconductor Xing, Kaijian Yang, Zherui Zhao, Weiyao Yin, Yuefeng Han, Huiping Wang, Shanhu Wang, Shifan Bullock, James Stacey, Alastair Belcourt, James A. Rubanov, Sergey Yin, Hang Broadway, David A. Tetienne, Jean-Philippe Yin, Xinmao Wu, Liang Qi, Dong-Chen Fuhrer, Michael S. Ou, Qingdong Wang, Xiao Renshaw Materials Science The p-type transistor is an indispensable component of semiconductor technology, enabling complementary operation with n-channel transistors for computation, storage, and communication. Achieving both high robustness and high efficiency is highly desirable but challenging for p-type transistors due to limited semiconductors with reliable hole transport and their high activation energies. Here, we achieved a robust yet efficient p-type transistor by heterogeneously integrating an ultra-wide-bandgap semiconductor and a high-k dielectric layer through van der Waals integration. The p-type transistor employs a two-dimensional hole channel on hydrogenated diamond (bandgap 5.6 eV) combined with a high-k (30.5) SrTiO3 perovskite membrane. At room temperature, the transistor exhibits stable operation with a high on-current (~200 mA/mm), low subthreshold swing (70 mV/dec), high hole mobility (566 cm^2/Vs to 572 cm^2/Vs) and high on-off ratio (~10^9). Furthermore, tuning annealing temperature allows operation in either enhancement or depletion mode. The robust p-type transistor with high efficiency holds great potential for future power electronics, UV optoelectronics, and harsh-environment electronic applications. |
| title | Efficient and Robust p-type Transistor based on Ultra-wide-bandgap Semiconductor |
| topic | Materials Science |
| url | https://arxiv.org/abs/2602.07424 |