2.5D co-packaged optical I/O chipsets on a SiON/Si interposer for 4 $\times$ 100G optical interconnection
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arXiv
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| Auteurs principaux: | , , , , , , , , , , , |
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| Format: | Preprint |
| Publié: |
2026
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| _version_ | 1866915785781280768 |
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| author | Hou, Daibao Yao, Yuntian Cheng, Xiaotian Ding, Shuning Wu, Qiyou Hu, Yonghong Pan, Wei Huang, Chao Zhu, Huihui Huang, Yongzhen Li, Chenhui Jin, Chaoyuan |
| author_facet | Hou, Daibao Yao, Yuntian Cheng, Xiaotian Ding, Shuning Wu, Qiyou Hu, Yonghong Pan, Wei Huang, Chao Zhu, Huihui Huang, Yongzhen Li, Chenhui Jin, Chaoyuan |
| contents | Optical I/O technologies have emerged as a potential industrial solution for high-performance data interconnection in AI/ML computing acceleration. While optical I/Os are deployed at the edge of computational chips by co-packaged optics (CPO), flexible and high-performance integration architectures need to be explored to address system-level challenges. In this work, we present and experimentally demonstrate a SiON/Si-based optical interposer that integrates high-bandwidth and energy-efficient optical I/O chipsets. High-performance photonic and electronic components are co-packaged on the interposer, leading to low-loss, signal-integrity-friendly, and thermally efficient characteristics. The optical interposer incorporates low-loss SiON photonic circuits to realize scalable waveguide routing and wavelength-division multiplexing (WDM) with polarization-insensitive operation and high fabrication tolerance, while supporting flip-chip integration with InP-based active devices, including electro-absorption modulated lasers (EMLs) and photodetectors (PDs). Based on this architecture, a 400-Gb/s single-fiber optical transceiver is implemented and experimentally evaluated. Clear eye diagrams and high receiver sensitivity demonstrate reliable high-speed data transmission, which offers scalable, high-bandwidth optical I/Os in future high-performance computational clusters. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2602_08284 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | 2.5D co-packaged optical I/O chipsets on a SiON/Si interposer for 4 $\times$ 100G optical interconnection Hou, Daibao Yao, Yuntian Cheng, Xiaotian Ding, Shuning Wu, Qiyou Hu, Yonghong Pan, Wei Huang, Chao Zhu, Huihui Huang, Yongzhen Li, Chenhui Jin, Chaoyuan Optics Optical I/O technologies have emerged as a potential industrial solution for high-performance data interconnection in AI/ML computing acceleration. While optical I/Os are deployed at the edge of computational chips by co-packaged optics (CPO), flexible and high-performance integration architectures need to be explored to address system-level challenges. In this work, we present and experimentally demonstrate a SiON/Si-based optical interposer that integrates high-bandwidth and energy-efficient optical I/O chipsets. High-performance photonic and electronic components are co-packaged on the interposer, leading to low-loss, signal-integrity-friendly, and thermally efficient characteristics. The optical interposer incorporates low-loss SiON photonic circuits to realize scalable waveguide routing and wavelength-division multiplexing (WDM) with polarization-insensitive operation and high fabrication tolerance, while supporting flip-chip integration with InP-based active devices, including electro-absorption modulated lasers (EMLs) and photodetectors (PDs). Based on this architecture, a 400-Gb/s single-fiber optical transceiver is implemented and experimentally evaluated. Clear eye diagrams and high receiver sensitivity demonstrate reliable high-speed data transmission, which offers scalable, high-bandwidth optical I/Os in future high-performance computational clusters. |
| title | 2.5D co-packaged optical I/O chipsets on a SiON/Si interposer for 4 $\times$ 100G optical interconnection |
| topic | Optics |
| url | https://arxiv.org/abs/2602.08284 |