Cover Image

Benchmarking for Single Feature Attribution with Microarchitecture Cliffs

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Zhen, Hao, Kang, Qingxuan, Bao, Yungang, Carlson, Trevor E.
Format:	Preprint
Published:	2026
Subjects:	Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

From Characterization to Microarchitecture: Designing an Elegant and Reliable BFP-Based NPU
by: Zhang, Jie, et al.
Published: (2026)

GSIM: Accelerating RTL Simulation for Large-Scale Designs
by: Chen, Lu, et al.
Published: (2025)

Microarchitecture Design and Benchmarking of Custom SHA-3 Instruction for RISC-V
by: Bolat, Alperen, et al.
Published: (2025)

NeuroAI Temporal Neural Networks (NeuTNNs): Microarchitecture and Design Framework for Specialized Neuromorphic Processing Units
by: Venkatachalam, Shanmuga, et al.
Published: (2026)

Cassandra: Efficient Enforcement of Sequential Execution for Cryptographic Programs (Extended Version)
by: Hajiabadi, Ali, et al.
Published: (2024)

Automatic Microarchitecture-Aware Custom Instruction Design for RISC-V Processors
by: Rezunov, Evgenii, et al.
Published: (2025)

Evaluating the Effectiveness of Microarchitectural Hardware Fault Detection for Application-Specific Requirements
by: Papadopoulos, Konstantinos-Nikolaos, et al.
Published: (2024)

PacQ: A SIMT Microarchitecture for Efficient Dataflow in Hyper-asymmetric GEMMs
by: Yin, Ruokai, et al.
Published: (2025)

TurboFuzz: FPGA Accelerated Hardware Fuzzing for Processor Agile Verification
by: Zhong, Yang, et al.
Published: (2025)

Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing
by: Huo, Juncheng, et al.
Published: (2025)

SemanticBBV: A Semantic Signature for Cross-Program Knowledge Reuse in Microarchitecture Simulation
by: Liu, Zhenguo, et al.
Published: (2025)

PyPIM: Integrating Digital Processing-in-Memory from Microarchitectural Design to Python Tensors
by: Leitersdorf, Orian, et al.
Published: (2023)

GME: GPU-based Microarchitectural Extensions to Accelerate Homomorphic Encryption
by: Shivdikar, Kaustubh, et al.
Published: (2023)

Supporting Secured Integration of Microarchitectural Defenses
by: Ramkrishnan, Kartik, et al.
Published: (2026)

Microarchitectural Co-Optimization for Sustained Throughput of RISC-V Multi-Lane Chaining Vector Processors
by: Wang, Weiying, et al.
Published: (2026)

A4: Microarchitecture-Aware LLC Management for Datacenter Servers with Emerging I/O Devices
by: Park, Haneul, et al.
Published: (2025)

Rethinking Compute Substrates for 3D-Stacked Near-Memory LLM Decoding: Microarchitecture-Scheduling Co-Design
by: Ai, Chenyang, et al.
Published: (2026)

FHECore: Rethinking GPU Microarchitecture for Fully Homomorphic Encryption
by: Daksha, Lohit, et al.
Published: (2026)

Tao: Re-Thinking DL-based Microarchitecture Simulation
by: Pandey, Santosh, et al.
Published: (2024)

Oreo: Protecting ASLR Against Microarchitectural Attacks (Extended Version)
by: Song, Shixin, et al.
Published: (2024)

Pre-cache: A Microarchitectural Solution to prevent Meltdown and Spectre
by: Sethumurugan, Subhash, et al.
Published: (2025)

Rigorous Evaluation of Microarchitectural Side-Channels with Statistical Model Checking
by: Li, Weihang, et al.
Published: (2025)

DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands
by: Nam, Hwayong, et al.
Published: (2024)

Regular-Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures
by: Anik, Shafayat Mowla, et al.
Published: (2026)

HiMA: Hierarchical Quantum Microarchitecture for Qubit-Scaling and Quantum Process-Level Parallelism
by: Zhou, Qi, et al.
Published: (2024)

ShadowBinding: Realizing Effective Microarchitectures for In-Core Secure Speculation Schemes
by: Kvalsvik, Amund Bergland, et al.
Published: (2025)

SemPat: Using Hyperproperty-based Semantic Analysis to Generate Microarchitectural Attack Patterns
by: Godbole, Adwait, et al.
Published: (2024)

Fine Grain 3D Integration for Microarchitecture Design Through Cube Packing Exploration
by: Liu, Yongxiang, et al.
Published: (2025)

ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors
by: Narkthong, Nuntipat, et al.
Published: (2025)

FireGuard: A Generalized Microarchitecture for Fine-Grained Security Analysis on OoO Superscalar Cores
by: Jiang, Zhe, et al.
Published: (2025)

DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining
by: Hassan, Muhammad, et al.
Published: (2025)

ForgeBench: A Machine Learning Benchmark Suite and Auto-Generation Framework for Next-Generation HLS Tools
by: Wanna, Andy, et al.
Published: (2025)

CounterPoint: Using Hardware Event Counters to Refute and Refine Microarchitectural Assumptions (Extended Version)
by: Lindsay, Nick, et al.
Published: (2026)

basic_RV32s: An Open-Source Microarchitectural Roadmap for RISC-V RV32I
by: Kang, Hyun Woo, et al.
Published: (2025)

EEspice: A Modular Circuit Simulation Platform with Parallel Device Model Evaluation via Graph Coloring
by: Bao, Xuanhao, et al.
Published: (2026)

Benchmarking and Dissecting the Nvidia Hopper GPU Architecture
by: Luo, Weile, et al.
Published: (2024)

HeLEx: A Heterogeneous Layout Explorer for Spatial Elastic Coarse-Grained Reconfigurable Arrays
by: Du, Alan Jia Bao, et al.
Published: (2025)

CAT: Customized Transformer Accelerator Framework on Versal ACAP
by: Zhang, Wenbo, et al.
Published: (2024)

EMiX: Emulating Beyond Single-FPGA Limits
by: Kropotov, Alexander, et al.
Published: (2026)

Development of simulation model for Single Carrier Transceiver for Nanosatellite
by: K, Pallewela R. C., et al.
Published: (2024)