ABI: A tightly integrated, unified, sparsity-aware, reconfigurable, compute near-register file/cache GPU architecture with light-weight softmax for deep learning, linear algebra, and Ising compute

Documenti analoghi

• A complete discussion on fully reconfigurable, digital, scalable, graph and sparsity-aware near-memory accelerator for graph neural networks
  di: Raman, Siddhartha Raman Sundara, et al.
  Pubblicazione: (2026)
• A comprehensive study on ILP acceleration accounting for sparsity, area, energy, data movement using near-memory architecture
  di: Raman, Siddhartha Raman Sundara, et al.
  Pubblicazione: (2026)
• A comparative study on power delivery aspects of compute-in/near-memory approaches using DRAM
  di: Raman, Siddhartha Raman Sundara, et al.
  Pubblicazione: (2026)
• Emerging memory technologies at room/cryogenic temperature
  di: Raman, Siddhartha Raman Sundara
  Pubblicazione: (2026)
• GRAMC: General-purpose and reconfigurable analog matrix computing architecture
  di: Pan, Lunshuai, et al.
  Pubblicazione: (2025)