Rethinking Clause Management for CDCL SAT Solvers

Fuente: arXiv
Enregistré dans:
Détails bibliographiques
Auteurs principaux: Cai, Yalun, Zhang, Xindi, Shi, Zhengyuan, Tao, Mengxia, Xu, Qiang
Format: Preprint
Publié: 2026
Sujets:
Accès en ligne:
Tags: Ajouter un tag
Pas de tags, Soyez le premier à ajouter un tag!
_version_ 1866908851742179328
author Cai, Yalun
Zhang, Xindi
Shi, Zhengyuan
Tao, Mengxia
Xu, Qiang
author_facet Cai, Yalun
Zhang, Xindi
Shi, Zhengyuan
Tao, Mengxia
Xu, Qiang
contents Boolean Satisfiability (SAT) solving underpins a wide range of applications in Electronic Design Automation (EDA), particularly formal verification. However, this paper observes that the mainstream clause reduction heuristic in modern SAT solvers becomes ineffective in the critical domain of complex arithmetic circuit verification, such as multipliers. On these instances, the dominant Literal Block Distance (LBD) metric for measuring clause quality degrades into a simple value of clause length, without any perception of dynamic clause usage during solving. To address this issue, a novel clause reduction mechanism is proposed, which is entirely independent of LBD. Its core idea is to decouple and handle separately the two most fundamental characteristics of learnt clauses--inherent lineage and dynamic usage patterns--thereby avoiding the efficiency degradation caused by inappropriately mixing these properties. Experiments show that our method consistently improves mainstream solvers and achieves speedups of up to 5.74x on complex arithmetic circuit problems, while maintaining comparable performance on general-purpose benchmarks. These results challenge the prevailing LBD-centric clause quality metric for clause management.
format Preprint
id arxiv_https___arxiv_org_abs_2602_20829
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle Rethinking Clause Management for CDCL SAT Solvers
Cai, Yalun
Zhang, Xindi
Shi, Zhengyuan
Tao, Mengxia
Xu, Qiang
Logic in Computer Science
Boolean Satisfiability (SAT) solving underpins a wide range of applications in Electronic Design Automation (EDA), particularly formal verification. However, this paper observes that the mainstream clause reduction heuristic in modern SAT solvers becomes ineffective in the critical domain of complex arithmetic circuit verification, such as multipliers. On these instances, the dominant Literal Block Distance (LBD) metric for measuring clause quality degrades into a simple value of clause length, without any perception of dynamic clause usage during solving. To address this issue, a novel clause reduction mechanism is proposed, which is entirely independent of LBD. Its core idea is to decouple and handle separately the two most fundamental characteristics of learnt clauses--inherent lineage and dynamic usage patterns--thereby avoiding the efficiency degradation caused by inappropriately mixing these properties. Experiments show that our method consistently improves mainstream solvers and achieves speedups of up to 5.74x on complex arithmetic circuit problems, while maintaining comparable performance on general-purpose benchmarks. These results challenge the prevailing LBD-centric clause quality metric for clause management.
title Rethinking Clause Management for CDCL SAT Solvers
topic Logic in Computer Science
url https://arxiv.org/abs/2602.20829