Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler
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arXiv
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| Autori principali: | , , , , , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2026
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| _version_ | 1866918355272728576 |
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| author | Wang, Xinxin Yan, Lixian Liu, Shuhan Upton, Luke Cai, Zhuoqi Tan, Yiming Li, Shengman Jana, Koustav Li, Peijing Cirimelli-Low, Jesse Tambe, Thierry Guthaus, Matthew Wong, H. -S. Philip |
| author_facet | Wang, Xinxin Yan, Lixian Liu, Shuhan Upton, Luke Cai, Zhuoqi Tan, Yiming Li, Shengman Jana, Koustav Li, Peijing Cirimelli-Low, Jesse Tambe, Thierry Guthaus, Matthew Wong, H. -S. Philip |
| contents | As memory increasingly dominates system cost and energy, heterogeneous on-chip memory systems that combine technologies with complementary characteristics are becoming essential. Gain Cell RAM (GCRAM) offers higher density, lower power, and tunable retention, expanding the design space beyond conventional SRAM. To this end, we create an OpenGCRAM compiler supporting both SRAM and GCRAM. It generates macro-level designs and layouts for commercial CMOS processes and characterizes area, delay, and power across user-defined configurations. The tool enables systematic identification of optimal heterogeneous memory configurations for AI tasks under specified performance metrics. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2602_21278 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler Wang, Xinxin Yan, Lixian Liu, Shuhan Upton, Luke Cai, Zhuoqi Tan, Yiming Li, Shengman Jana, Koustav Li, Peijing Cirimelli-Low, Jesse Tambe, Thierry Guthaus, Matthew Wong, H. -S. Philip Hardware Architecture Systems and Control As memory increasingly dominates system cost and energy, heterogeneous on-chip memory systems that combine technologies with complementary characteristics are becoming essential. Gain Cell RAM (GCRAM) offers higher density, lower power, and tunable retention, expanding the design space beyond conventional SRAM. To this end, we create an OpenGCRAM compiler supporting both SRAM and GCRAM. It generates macro-level designs and layouts for commercial CMOS processes and characterizes area, delay, and power across user-defined configurations. The tool enables systematic identification of optimal heterogeneous memory configurations for AI tasks under specified performance metrics. |
| title | Heterogeneous Memory Design Exploration for AI Accelerators with a Gain Cell Memory Compiler |
| topic | Hardware Architecture Systems and Control |
| url | https://arxiv.org/abs/2602.21278 |