SAILOR: A Scalable and Energy-Efficient Ultra-Lightweight RISC-V for IoT Security
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arXiv
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| Auteurs principaux: | , , , , , , , |
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| Format: | Preprint |
| Publié: |
2026
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| _version_ | 1866918360244027392 |
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| author | Ewert, Christian Hardow, Tim Fritsch, Melf Dietrich, Leon Strunck, Henrik Buchty, Rainer Berekovic, Mladen Mulhem, Saleh |
| author_facet | Ewert, Christian Hardow, Tim Fritsch, Melf Dietrich, Leon Strunck, Henrik Buchty, Rainer Berekovic, Mladen Mulhem, Saleh |
| contents | Recently, RISC-V has contributed to the development of IoT devices, requiring architectures that balance energy efficiency, compact area, and integrated security. However, most recent RISC-V cores for IoT prioritize either area footprint or energy efficiency, while adding cryptographic support further compromises compactness. As a result, truly integrated architectures that simultaneously optimize efficiency and security remain largely unexplored, leaving constrained IoT environments vulnerable to performance and security trade-offs. In this paper, we introduce SAILOR, an energy-efficient and scalable ultra-lightweight RISC-V core family for cryptographic applications in IoT. Our design is modular and spans 1-, 2-, 4-, 8-, 16-, and 32-bit serialized execution data-paths, prioritizing minimal area. This modular design and adaptable data-path minimizes the overhead of integrating RISC-V cryptography extensions, achieving low hardware cost while significantly improving energy efficiency. We validate our design approach through a comprehensive analysis of area, energy, and efficiency trade-offs. The results surpass state-of-the-art solutions in both performance and energy efficiency by up to 13x and reduce area by up to 59 %, demonstrating that lightweight cryptographic features can be added without prohibitive overhead, and that energy- or area-efficient designs need not compromise performance. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2602_24166 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | SAILOR: A Scalable and Energy-Efficient Ultra-Lightweight RISC-V for IoT Security Ewert, Christian Hardow, Tim Fritsch, Melf Dietrich, Leon Strunck, Henrik Buchty, Rainer Berekovic, Mladen Mulhem, Saleh Cryptography and Security Hardware Architecture Recently, RISC-V has contributed to the development of IoT devices, requiring architectures that balance energy efficiency, compact area, and integrated security. However, most recent RISC-V cores for IoT prioritize either area footprint or energy efficiency, while adding cryptographic support further compromises compactness. As a result, truly integrated architectures that simultaneously optimize efficiency and security remain largely unexplored, leaving constrained IoT environments vulnerable to performance and security trade-offs. In this paper, we introduce SAILOR, an energy-efficient and scalable ultra-lightweight RISC-V core family for cryptographic applications in IoT. Our design is modular and spans 1-, 2-, 4-, 8-, 16-, and 32-bit serialized execution data-paths, prioritizing minimal area. This modular design and adaptable data-path minimizes the overhead of integrating RISC-V cryptography extensions, achieving low hardware cost while significantly improving energy efficiency. We validate our design approach through a comprehensive analysis of area, energy, and efficiency trade-offs. The results surpass state-of-the-art solutions in both performance and energy efficiency by up to 13x and reduce area by up to 59 %, demonstrating that lightweight cryptographic features can be added without prohibitive overhead, and that energy- or area-efficient designs need not compromise performance. |
| title | SAILOR: A Scalable and Energy-Efficient Ultra-Lightweight RISC-V for IoT Security |
| topic | Cryptography and Security Hardware Architecture |
| url | https://arxiv.org/abs/2602.24166 |