RTLocating: Intent-aware RTL Localization for Hardware Design Iteration
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arXiv
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| Main Authors: | , , , , , , , |
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| Format: | Preprint |
| Published: |
2026
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| _version_ | 1866917300634910720 |
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| author | Xing, Changwen Lu, Yanfeng Qi, Lei Niu, Chenxu Li, Jie Wang, Xi Chen, Yong Yang, Jun |
| author_facet | Xing, Changwen Lu, Yanfeng Qi, Lei Niu, Chenxu Li, Jie Wang, Xi Chen, Yong Yang, Jun |
| contents | Industrial chip development is inherently iterative, favoring localized, intent-driven updates over rewriting RTL from scratch. Yet most LLM-Aided Hardware Design (LAD) work focuses on one-shot synthesis, leaving this workflow underexplored. To bridge this gap, we for the first time formalize $Δ$Spec-to-RTL localization, a multi-positive problem mapping natural language change requests ($Δ$Spec) to the affected Register Transfer Level (RTL) syntactic blocks. We propose RTLocating, an intent-aware RTL localization framework, featuring a dynamic router that adaptively fuses complementary views from a textual semantic encoder, a local structural encoder, and a global interaction and dependency encoder (GLIDE). To enable scalable supervision, we introduce EvoRTL-Bench, the first industrial-scale benchmark for intent-code alignment derived from OpenTitan's Git history, comprising 1,905 validated requests and 13,583 $Δ$Spec-RTL block pairs. On EvoRTL-Bench, RTLocating achieves 0.568 MRR and 15.08% R@1, outperforming the strongest baseline by +22.9% and +67.0%, respectively, establishing a new state-of-the-art for intent-driven localization in evolving hardware designs. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2603_00434 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | RTLocating: Intent-aware RTL Localization for Hardware Design Iteration Xing, Changwen Lu, Yanfeng Qi, Lei Niu, Chenxu Li, Jie Wang, Xi Chen, Yong Yang, Jun Emerging Technologies Computation and Language Information Retrieval Industrial chip development is inherently iterative, favoring localized, intent-driven updates over rewriting RTL from scratch. Yet most LLM-Aided Hardware Design (LAD) work focuses on one-shot synthesis, leaving this workflow underexplored. To bridge this gap, we for the first time formalize $Δ$Spec-to-RTL localization, a multi-positive problem mapping natural language change requests ($Δ$Spec) to the affected Register Transfer Level (RTL) syntactic blocks. We propose RTLocating, an intent-aware RTL localization framework, featuring a dynamic router that adaptively fuses complementary views from a textual semantic encoder, a local structural encoder, and a global interaction and dependency encoder (GLIDE). To enable scalable supervision, we introduce EvoRTL-Bench, the first industrial-scale benchmark for intent-code alignment derived from OpenTitan's Git history, comprising 1,905 validated requests and 13,583 $Δ$Spec-RTL block pairs. On EvoRTL-Bench, RTLocating achieves 0.568 MRR and 15.08% R@1, outperforming the strongest baseline by +22.9% and +67.0%, respectively, establishing a new state-of-the-art for intent-driven localization in evolving hardware designs. |
| title | RTLocating: Intent-aware RTL Localization for Hardware Design Iteration |
| topic | Emerging Technologies Computation and Language Information Retrieval |
| url | https://arxiv.org/abs/2603.00434 |