SoberDSE: Sample-Efficient Design Space Exploration via Learning-Based Algorithm Selection
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| Format: | Preprint |
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2026
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| _version_ | 1866912934533267456 |
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| author | Xu, Lei Wang, Shanshan Xiao, Chenglong |
| author_facet | Xu, Lei Wang, Shanshan Xiao, Chenglong |
| contents | High-Level Synthesis (HLS) is a pivotal electronic design automation (EDA) technology that enables the generation of hardware circuits from high-level language descriptions. A critical step in HLS is Design Space Exploration (DSE), which seeks to identify high-quality hardware architectures under given constraints. However, the enormous size of the design space makes DSE computationally prohibitive. Although numerous algorithms have been proposed to accelerate DSE, our extensive experimental studies reveal that no single algorithm consistently achieves Pareto dominance across all problem instances. Consequently, the inability of any single algorithm to dominate all benchmarks necessitates an automated selection mechanism to identify the best-performing DSE algorithm for each specific case. To address this challenge, we propose the SoberDSE framework, which recommends suitable algorithm based on benchmark characteristics. Experimental results demonstrate that our SoberDSE framework significantly outperforms state-of-the-art heuristic-based DSE algorithms by up to 5.7 $\times$ and state-of-the-art learning-based DSE methods by up to 4.2 $\times$. Furthermore, compared to conventional classification models, SoberDSE delivers superior accuracy in small-sample learning scenarios, with an average enhancement of 35.57\%. Code and models are available at https://anonymous.4open.science/r/Sober-4377. |
| format | Preprint |
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arxiv_https___arxiv_org_abs_2603_00986 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | SoberDSE: Sample-Efficient Design Space Exploration via Learning-Based Algorithm Selection Xu, Lei Wang, Shanshan Xiao, Chenglong Hardware Architecture Machine Learning High-Level Synthesis (HLS) is a pivotal electronic design automation (EDA) technology that enables the generation of hardware circuits from high-level language descriptions. A critical step in HLS is Design Space Exploration (DSE), which seeks to identify high-quality hardware architectures under given constraints. However, the enormous size of the design space makes DSE computationally prohibitive. Although numerous algorithms have been proposed to accelerate DSE, our extensive experimental studies reveal that no single algorithm consistently achieves Pareto dominance across all problem instances. Consequently, the inability of any single algorithm to dominate all benchmarks necessitates an automated selection mechanism to identify the best-performing DSE algorithm for each specific case. To address this challenge, we propose the SoberDSE framework, which recommends suitable algorithm based on benchmark characteristics. Experimental results demonstrate that our SoberDSE framework significantly outperforms state-of-the-art heuristic-based DSE algorithms by up to 5.7 $\times$ and state-of-the-art learning-based DSE methods by up to 4.2 $\times$. Furthermore, compared to conventional classification models, SoberDSE delivers superior accuracy in small-sample learning scenarios, with an average enhancement of 35.57\%. Code and models are available at https://anonymous.4open.science/r/Sober-4377. |
| title | SoberDSE: Sample-Efficient Design Space Exploration via Learning-Based Algorithm Selection |
| topic | Hardware Architecture Machine Learning |
| url | https://arxiv.org/abs/2603.00986 |