Characterizing VLA Models: Identifying the Action Generation Bottleneck for Edge AI Architectures
Fuente:
arXiv
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| Main Authors: | Vishwanathan, Manoj, Subramanian, Suvinay, Raghunathan, Anand |
|---|---|
| Format: | Preprint |
| Published: |
2026
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| Subjects: | |
| Online Access: | |
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