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Hauptverfasser: Rahman, Md. Mamunur, Vahapoglu, Ensar, Chan, Kok Wai, Tanttu, Tuomo, Dash, Ajit, Huang, Jonathan Yue, Yianni, Steve, Chenniappan, Venkatesh, Cifuentes, Jesús D., Hudson, Fay, Escott, Christopher C., Lee, Yik Kheng, Stuyck, Nard Dumoulin, Laucht, Arne, Morello, Andrea, Saraiva, Andre, Cole, Jared H., Dzurak, Andrew S., Lim, Wee Han
Format: Preprint
Veröffentlicht: 2026
Schlagworte:
Online-Zugang:https://arxiv.org/abs/2603.02814
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author Rahman, Md. Mamunur
Vahapoglu, Ensar
Chan, Kok Wai
Tanttu, Tuomo
Dash, Ajit
Huang, Jonathan Yue
Yianni, Steve
Chenniappan, Venkatesh
Cifuentes, Jesús D.
Hudson, Fay
Escott, Christopher C.
Lee, Yik Kheng
Stuyck, Nard Dumoulin
Laucht, Arne
Morello, Andrea
Saraiva, Andre
Cole, Jared H.
Dzurak, Andrew S.
Lim, Wee Han
author_facet Rahman, Md. Mamunur
Vahapoglu, Ensar
Chan, Kok Wai
Tanttu, Tuomo
Dash, Ajit
Huang, Jonathan Yue
Yianni, Steve
Chenniappan, Venkatesh
Cifuentes, Jesús D.
Hudson, Fay
Escott, Christopher C.
Lee, Yik Kheng
Stuyck, Nard Dumoulin
Laucht, Arne
Morello, Andrea
Saraiva, Andre
Cole, Jared H.
Dzurak, Andrew S.
Lim, Wee Han
contents We systematically investigate the interplay between materials engineering, quantum transport, and low-frequency charge noise in silicon metal--oxide--semiconductor (SiMOS) quantum devices. By combining Hall-bar transport measurements with charge-noise spectroscopy of gate-defined quantum dots, we identify correlations between gate-stack design, carrier mobility, and electrostatic noise, providing an experimental case study of material and process dependencies relevant to low-noise, high-mobility operation. Hall-bar studies reveal that increasing the atomic-layer-deposition temperature of Al$_2$O$_3$ markedly enhances mobility, whereas the choice of oxidant has little impact. Devices incorporating HfO$_2$ exhibit improved carrier mobility, an interesting observation that can plausibly be attributed to defect passivation associated with aluminum diffusion from the gate metal into the HfO$_2$ layer. Charge-noise measurements show a strong correlation between higher mobility and reduced noise, with TiPd-gated devices displaying both degraded transport and elevated charge noise. In contrast, the poly-Si-gated CMOS-foundry device achieves the lowest noise levels. Finally, dual-feedback dot--sensor stability mapping demonstrates enhanced charge stability in devices with the gate stacks studied here, underscoring their promise for scalable, high-fidelity silicon spin-qubit platforms.
format Preprint
id arxiv_https___arxiv_org_abs_2603_02814
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle Gate Stack Engineering for High-Mobility and Low-Noise SiMOS Quantum Devices
Rahman, Md. Mamunur
Vahapoglu, Ensar
Chan, Kok Wai
Tanttu, Tuomo
Dash, Ajit
Huang, Jonathan Yue
Yianni, Steve
Chenniappan, Venkatesh
Cifuentes, Jesús D.
Hudson, Fay
Escott, Christopher C.
Lee, Yik Kheng
Stuyck, Nard Dumoulin
Laucht, Arne
Morello, Andrea
Saraiva, Andre
Cole, Jared H.
Dzurak, Andrew S.
Lim, Wee Han
Mesoscale and Nanoscale Physics
We systematically investigate the interplay between materials engineering, quantum transport, and low-frequency charge noise in silicon metal--oxide--semiconductor (SiMOS) quantum devices. By combining Hall-bar transport measurements with charge-noise spectroscopy of gate-defined quantum dots, we identify correlations between gate-stack design, carrier mobility, and electrostatic noise, providing an experimental case study of material and process dependencies relevant to low-noise, high-mobility operation. Hall-bar studies reveal that increasing the atomic-layer-deposition temperature of Al$_2$O$_3$ markedly enhances mobility, whereas the choice of oxidant has little impact. Devices incorporating HfO$_2$ exhibit improved carrier mobility, an interesting observation that can plausibly be attributed to defect passivation associated with aluminum diffusion from the gate metal into the HfO$_2$ layer. Charge-noise measurements show a strong correlation between higher mobility and reduced noise, with TiPd-gated devices displaying both degraded transport and elevated charge noise. In contrast, the poly-Si-gated CMOS-foundry device achieves the lowest noise levels. Finally, dual-feedback dot--sensor stability mapping demonstrates enhanced charge stability in devices with the gate stacks studied here, underscoring their promise for scalable, high-fidelity silicon spin-qubit platforms.
title Gate Stack Engineering for High-Mobility and Low-Noise SiMOS Quantum Devices
topic Mesoscale and Nanoscale Physics
url https://arxiv.org/abs/2603.02814