Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators
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arXiv
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| Auteurs principaux: | , , , |
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| Format: | Preprint |
| Publié: |
2026
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| _version_ | 1866908865573945344 |
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| author | Krestinskaya, Olga Fouda, Mohammed E. Eltawil, Ahmed Salama, Khaled N. |
| author_facet | Krestinskaya, Olga Fouda, Mohammed E. Eltawil, Ahmed Salama, Khaled N. |
| contents | Software-hardware co-design is essential for optimizing in-memory computing (IMC) hardware accelerators for neural networks. However, most existing optimization frameworks target a single workload, leading to highly specialized hardware designs that do not generalize well across models and applications. In contrast, practical deployment scenarios require a single IMC platform that can efficiently support multiple neural network workloads. This work presents a joint hardware-workload co-optimization framework based on an optimized evolutionary algorithm for designing generalized IMC accelerator architectures. By explicitly capturing cross-workload trade-offs rather than optimizing for a single model, the proposed approach significantly reduces the performance gap between workload-specific and generalized IMC designs. The framework is evaluated on both RRAM- and SRAM-based IMC architectures, demonstrating strong robustness and adaptability across diverse design scenarios. Compared to baseline methods, the optimized designs achieve energy-delay-area product (EDAP) reductions of up to 76.2% and 95.5% when optimizing across a small set (4 workloads) and a large set (9 workloads), respectively. The source code of the framework is available at https://github.com/OlgaKrestinskaya/JointHardwareWorkloadOptimizationIMC. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2603_03880 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators Krestinskaya, Olga Fouda, Mohammed E. Eltawil, Ahmed Salama, Khaled N. Hardware Architecture Artificial Intelligence Emerging Technologies Neural and Evolutionary Computing Systems and Control Software-hardware co-design is essential for optimizing in-memory computing (IMC) hardware accelerators for neural networks. However, most existing optimization frameworks target a single workload, leading to highly specialized hardware designs that do not generalize well across models and applications. In contrast, practical deployment scenarios require a single IMC platform that can efficiently support multiple neural network workloads. This work presents a joint hardware-workload co-optimization framework based on an optimized evolutionary algorithm for designing generalized IMC accelerator architectures. By explicitly capturing cross-workload trade-offs rather than optimizing for a single model, the proposed approach significantly reduces the performance gap between workload-specific and generalized IMC designs. The framework is evaluated on both RRAM- and SRAM-based IMC architectures, demonstrating strong robustness and adaptability across diverse design scenarios. Compared to baseline methods, the optimized designs achieve energy-delay-area product (EDAP) reductions of up to 76.2% and 95.5% when optimizing across a small set (4 workloads) and a large set (9 workloads), respectively. The source code of the framework is available at https://github.com/OlgaKrestinskaya/JointHardwareWorkloadOptimizationIMC. |
| title | Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators |
| topic | Hardware Architecture Artificial Intelligence Emerging Technologies Neural and Evolutionary Computing Systems and Control |
| url | https://arxiv.org/abs/2603.03880 |