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Main Authors: Abdkrimi, Mounir, Rossetto, Olivier, Bourrion, Olivier, Vescovi, Christophe, Hoarau, Christophe
Format: Preprint
Published: 2026
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Online Access:https://arxiv.org/abs/2603.04087
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author Abdkrimi, Mounir
Rossetto, Olivier
Bourrion, Olivier
Vescovi, Christophe
Hoarau, Christophe
author_facet Abdkrimi, Mounir
Rossetto, Olivier
Bourrion, Olivier
Vescovi, Christophe
Hoarau, Christophe
contents The KID_READOUT board, developed for the CONCERTO millimeter-wave astronomy instrument, implements FPGA-based digital frequency multiplexing to read out large arrays of Microwave Kinetic Inductance Detectors (MKIDs). The complexity of the implemented multirate DSP chain, which combines tones synthesis, interpolation, digital frequency translation, polyphase filter-bank (PFB) channelization, and digital down-conversion (DDC), makes analytical performance optimization difficult. To address this, we developed a cycle-and bitaccurate, Python-based digital twin of the FPGA readout firmware DSP chain. Using this model, we identified the origin of previously measured and unexplained spurs in the readout channels, tracing them to periodicity mismatches between the excitation and analysis paths and to insufficient suppression of negative-frequency components by the DDC filters. Based on these insights, we implemented a mitigation strategy that aligns the periodicities and improves the DDC filter characteristics, effectively eliminating the spurs with a minor increase in FPGA resource usage.
format Preprint
id arxiv_https___arxiv_org_abs_2603_04087
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle A Digital Twin of the FPGA Digital Signal Processing Chain for MKIDs Readout: Root-Cause Analysis and Mitigation of Spurs
Abdkrimi, Mounir
Rossetto, Olivier
Bourrion, Olivier
Vescovi, Christophe
Hoarau, Christophe
Signal Processing
The KID_READOUT board, developed for the CONCERTO millimeter-wave astronomy instrument, implements FPGA-based digital frequency multiplexing to read out large arrays of Microwave Kinetic Inductance Detectors (MKIDs). The complexity of the implemented multirate DSP chain, which combines tones synthesis, interpolation, digital frequency translation, polyphase filter-bank (PFB) channelization, and digital down-conversion (DDC), makes analytical performance optimization difficult. To address this, we developed a cycle-and bitaccurate, Python-based digital twin of the FPGA readout firmware DSP chain. Using this model, we identified the origin of previously measured and unexplained spurs in the readout channels, tracing them to periodicity mismatches between the excitation and analysis paths and to insufficient suppression of negative-frequency components by the DDC filters. Based on these insights, we implemented a mitigation strategy that aligns the periodicities and improves the DDC filter characteristics, effectively eliminating the spurs with a minor increase in FPGA resource usage.
title A Digital Twin of the FPGA Digital Signal Processing Chain for MKIDs Readout: Root-Cause Analysis and Mitigation of Spurs
topic Signal Processing
url https://arxiv.org/abs/2603.04087