A Scheduler for the Active Volume Architecture

Fuente: arXiv
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Autori principali: Heavey, Sam, Caesura, Athena
Natura: Preprint
Pubblicazione: 2026
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author Heavey, Sam
Caesura, Athena
author_facet Heavey, Sam
Caesura, Athena
contents We improve the accuracy of Active Volume resource estimates by explicitly scheduling when Active Volume blocks execute. We present software that uses a greedy strategy to assign each logical qubit a role in each logical cycle (e.g., workspace, stale state storage, and bridge qubits). We empirically derive a novel formula for bridge- and stale-state-qubit overheads and improve the accuracy of runtime estimates, revealing that larger circuits can run on a given computer than previously predicted by analytic models. For a $4\times4$ Fermi-Hubbard simulation test circuit, this yields a $1.76\times$ runtime speedup with a $1.44\times$ reduction in bridge- and stale-state-qubit overheads compared to the model used in arXiv:2501.06165. Moreover, we show that for this test circuit, reaction times are insignificant in runtime estimates for computers with fewer than 600 logical qubits and that the number of reaction layers per logical cycle remains 1 in this regime. Our results pave the way for a full compilation pipeline for the Active Volume architecture and improved analytic resource estimates.
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id arxiv_https___arxiv_org_abs_2603_06376
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle A Scheduler for the Active Volume Architecture
Heavey, Sam
Caesura, Athena
Quantum Physics
We improve the accuracy of Active Volume resource estimates by explicitly scheduling when Active Volume blocks execute. We present software that uses a greedy strategy to assign each logical qubit a role in each logical cycle (e.g., workspace, stale state storage, and bridge qubits). We empirically derive a novel formula for bridge- and stale-state-qubit overheads and improve the accuracy of runtime estimates, revealing that larger circuits can run on a given computer than previously predicted by analytic models. For a $4\times4$ Fermi-Hubbard simulation test circuit, this yields a $1.76\times$ runtime speedup with a $1.44\times$ reduction in bridge- and stale-state-qubit overheads compared to the model used in arXiv:2501.06165. Moreover, we show that for this test circuit, reaction times are insignificant in runtime estimates for computers with fewer than 600 logical qubits and that the number of reaction layers per logical cycle remains 1 in this regime. Our results pave the way for a full compilation pipeline for the Active Volume architecture and improved analytic resource estimates.
title A Scheduler for the Active Volume Architecture
topic Quantum Physics
url https://arxiv.org/abs/2603.06376