System-Technology Co-Optimization of Bitline Routing and Bonding Pathways in Monolithic 3D DRAM Architectures
Fuente:
arXiv
Saved in:
| Main Authors: | Lee, Kiseok, Cho, Sungwon, Lim, Seongkwang, Datta, Suman, Yu, Shimeng |
|---|---|
| Format: | Preprint |
| Published: |
2026
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Stratum: System-Hardware Co-Design with Tiered Monolithic 3D-Stackable DRAM for Efficient MoE Serving
by: Pan, Yue, et al.
Published: (2025)
by: Pan, Yue, et al.
Published: (2025)
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms
by: Waqar, Faaiq, et al.
Published: (2025)
by: Waqar, Faaiq, et al.
Published: (2025)
GenDRAM:Hardware-Software Co-Design of General Platform in DRAM
by: Lu, Tsung-Han, et al.
Published: (2026)
by: Lu, Tsung-Han, et al.
Published: (2026)
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture
by: Olgun, Ataberk, et al.
Published: (2022)
by: Olgun, Ataberk, et al.
Published: (2022)
Hardware-Software Co-design for 3D-DRAM-based LLM Serving Accelerator
by: Li, Cong, et al.
Published: (2026)
by: Li, Cong, et al.
Published: (2026)
Shifting in-DRAM
by: Tegge, William C., et al.
Published: (2026)
by: Tegge, William C., et al.
Published: (2026)
Row Hammer Effect and Floating Body Effect of Monolithic 3D Stackable 1T1C DRAM
by: Cho, Sungwon, et al.
Published: (2025)
by: Cho, Sungwon, et al.
Published: (2025)
Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory
by: Hong, Jeongmin, et al.
Published: (2024)
by: Hong, Jeongmin, et al.
Published: (2024)
GEM3D CIM General Purpose Matrix Computation Using 3D Integrated SRAM eDRAM Hybrid Compute In Memory on Memory Architecture
by: Chakraborty, Subhradip, et al.
Published: (2026)
by: Chakraborty, Subhradip, et al.
Published: (2026)
ChatNeuroSim: An LLM Agent Framework for Automated Compute-in-Memory Accelerator Deployment and Optimization
by: Lee, Ming-Yen, et al.
Published: (2026)
by: Lee, Ming-Yen, et al.
Published: (2026)
A Full-Stack Performance Evaluation Infrastructure for 3D-DRAM-based LLM Accelerators
by: Li, Cong, et al.
Published: (2026)
by: Li, Cong, et al.
Published: (2026)
Rethinking the Producer-Consumer Relationship in Modern DRAM-Based Systems
by: Patel, Minesh, et al.
Published: (2024)
by: Patel, Minesh, et al.
Published: (2024)
PIM-FW: Hardware-Software Co-Design of All-pairs Shortest Paths in DRAM
by: Lu, Tsung-Han, et al.
Published: (2025)
by: Lu, Tsung-Han, et al.
Published: (2025)
EasyDRAM: An FPGA-based Infrastructure for Fast and Accurate End-to-End Evaluation of Emerging DRAM Techniques
by: Canpolat, Oğuzhan, et al.
Published: (2025)
by: Canpolat, Oğuzhan, et al.
Published: (2025)
Orthrus: Dual-Loop Automated Framework for System-Technology Co-Optimization
by: Ren, Yi, et al.
Published: (2025)
by: Ren, Yi, et al.
Published: (2025)
Exploring DRAM Cache Prefetching for Pooled Memory
by: Tirumalasetty, Chandrahas, et al.
Published: (2024)
by: Tirumalasetty, Chandrahas, et al.
Published: (2024)
TDRAM: Tag-enhanced DRAM for Efficient Caching
by: Babaie, Maryam, et al.
Published: (2024)
by: Babaie, Maryam, et al.
Published: (2024)
PIMfused: Near-Bank DRAM-PIM with Fused-layer Dataflow for CNN Data Transfer Optimization
by: Yang, Simei, et al.
Published: (2025)
by: Yang, Simei, et al.
Published: (2025)
ARMAN: A Reconfigurable Monolithic 3D Accelerator Architecture for Convolutional Neural Networks
by: Sedaghatgoo, Ali, et al.
Published: (2024)
by: Sedaghatgoo, Ali, et al.
Published: (2024)
LOCALUT: Harnessing Capacity-Computation Tradeoffs for LUT-Based Inference in DRAM-PIM
by: Hong, Junguk, et al.
Published: (2026)
by: Hong, Junguk, et al.
Published: (2026)
ATiM: Autotuning Tensor Programs for Processing-in-DRAM
by: Shin, Yongwon, et al.
Published: (2024)
by: Shin, Yongwon, et al.
Published: (2024)
A3D-MoE: Acceleration of Large Language Models with Mixture of Experts via 3D Heterogeneous Integration
by: Huang, Wei-Hsing, et al.
Published: (2025)
by: Huang, Wei-Hsing, et al.
Published: (2025)
DreamRAM: A Fine-Grained Configurable Design Space Modeling Tool for Custom 3D Die-Stacked DRAM
by: Cai, Victor, et al.
Published: (2025)
by: Cai, Victor, et al.
Published: (2025)
RED: Energy Optimization Framework for eDRAM-based PIM with Reconfigurable Voltage Swing and Retention-aware Scheduling
by: Kim, Jae-Young, et al.
Published: (2025)
by: Kim, Jae-Young, et al.
Published: (2025)
Proxima: Near-storage Acceleration for Graph-based Approximate Nearest Neighbor Search in 3D NAND
by: Xu, Weihong, et al.
Published: (2023)
by: Xu, Weihong, et al.
Published: (2023)
DRAM-Profiler: An Experimental DRAM RowHammer Vulnerability Profiling Mechanism
by: Zhou, Ranyang, et al.
Published: (2024)
by: Zhou, Ranyang, et al.
Published: (2024)
Membrane: Accelerating Database Analytics with Bank-Level DRAM-PIM Filtering
by: Shekar, Akhil, et al.
Published: (2025)
by: Shekar, Akhil, et al.
Published: (2025)
Corrigendum to: A Systematic Study of DDR4 DRAM Faults in the Field
by: Beigi, Majed Valad, et al.
Published: (2024)
by: Beigi, Majed Valad, et al.
Published: (2024)
RACAM: Enhancing DRAM with Reuse-Aware Computation and Automated Mapping for ML Inference
by: Ma, Siyuan, et al.
Published: (2025)
by: Ma, Siyuan, et al.
Published: (2025)
Shared-PIM: Enabling Concurrent Computation and Data Flow for Faster Processing-in-DRAM
by: Mamdouh, Ahmed, et al.
Published: (2024)
by: Mamdouh, Ahmed, et al.
Published: (2024)
Pathfinding Future PIM Architectures by Demystifying a Commercial PIM Technology
by: Hyun, Bongjoon, et al.
Published: (2023)
by: Hyun, Bongjoon, et al.
Published: (2023)
Low-Power Encoding for PAM-3 DRAM Bus
by: Nam, Jonghyeon, et al.
Published: (2024)
by: Nam, Jonghyeon, et al.
Published: (2024)
Optimized Memory System Architecture for VESA VDC-M Decoder with Multi-Slice Support
by: Yang, Hannah, et al.
Published: (2025)
by: Yang, Hannah, et al.
Published: (2025)
Hardware Acceleration of Kolmogorov-Arnold Network (KAN) in Large-Scale Systems
by: Huang, Wei-Hsing, et al.
Published: (2025)
by: Huang, Wei-Hsing, et al.
Published: (2025)
Self-Managing DRAM: A Low-Cost Framework for Enabling Autonomous and Efficient in-DRAM Operations
by: Hassan, Hasan, et al.
Published: (2022)
by: Hassan, Hasan, et al.
Published: (2022)
SoMa: Identifying, Exploring, and Understanding the DRAM Communication Scheduling Space for DNN Accelerators
by: Cai, Jingwei, et al.
Published: (2025)
by: Cai, Jingwei, et al.
Published: (2025)
PuDHammer: Experimental Analysis of Read Disturbance Effects of Processing-using-DRAM in Real DRAM Chips
by: Yuksel, Ismail Emir, et al.
Published: (2025)
by: Yuksel, Ismail Emir, et al.
Published: (2025)
DRAM Bender: An Extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM Chips
by: Olgun, Ataberk, et al.
Published: (2022)
by: Olgun, Ataberk, et al.
Published: (2022)
A comparative study on power delivery aspects of compute-in/near-memory approaches using DRAM
by: Raman, Siddhartha Raman Sundara, et al.
Published: (2026)
by: Raman, Siddhartha Raman Sundara, et al.
Published: (2026)
Kelle: Co-design KV Caching and eDRAM for Efficient LLM Serving in Edge Computing
by: Xia, Tianhua, et al.
Published: (2025)
by: Xia, Tianhua, et al.
Published: (2025)
Similar Items
-
Stratum: System-Hardware Co-Design with Tiered Monolithic 3D-Stackable DRAM for Efficient MoE Serving
by: Pan, Yue, et al.
Published: (2025) -
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms
by: Waqar, Faaiq, et al.
Published: (2025) -
GenDRAM:Hardware-Software Co-Design of General Platform in DRAM
by: Lu, Tsung-Han, et al.
Published: (2026) -
Sectored DRAM: A Practical Energy-Efficient and High-Performance Fine-Grained DRAM Architecture
by: Olgun, Ataberk, et al.
Published: (2022) -
Hardware-Software Co-design for 3D-DRAM-based LLM Serving Accelerator
by: Li, Cong, et al.
Published: (2026)