Cover Image

SRAM-Based Compute-in-Memory Accelerator for Linear-decay Spiking Neural Networks

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Shang, Hongyang, Dong, Shuai, Yang, Yahan, Yang, Junyi, Zhou, Peng, Basu, Arindam
Format:	Preprint
Published:	2026
Subjects:	Neural and Evolutionary Computing Artificial Intelligence Hardware Architecture
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

UniSpike: Accelerating Spiking Neural Networks on Neuromorphic Systems via Eliminating Address Redundancy
by: Xing, Qinghui, et al.
Published: (2026)

A Deep Neural Network Deployment Based on Resistive Memory Accelerator Simulation
by: Maram, Tejaswanth Reddy, et al.
Published: (2023)

SpiDR: A Reconfigurable Digital Compute-in-Memory Spiking Neural Network Accelerator for Event-based Perception
by: Sharma, Deepika, et al.
Published: (2024)

SpikeX: Exploring Accelerator Architecture and Network-Hardware Co-Optimization for Sparse Spiking Neural Networks
by: Xu, Boxun, et al.
Published: (2025)

Spiking Transformer Hardware Accelerators in 3D Integration
by: Xu, Boxun, et al.
Published: (2024)

SNAP-V: A RISC-V SoC with Configurable Neuromorphic Acceleration for Small-Scale Spiking Neural Networks
by: Gunawardana, Kanishka, et al.
Published: (2026)

Core Placement Optimization of Many-core Brain-Inspired Near-Storage Systems for Spiking Neural Network Training
by: Zhu, Xueke, et al.
Published: (2024)

A Reconfigurable Stream-Based FPGA Accelerator for Bayesian Confidence Propagation Neural Networks
by: Hafiz, Muhammad Ihsan Al, et al.
Published: (2025)

Fast Algorithms for Spiking Neural Network Simulation with FPGAs
by: Lindqvist, Björn A., et al.
Published: (2024)

Hybrid Synaptic Structure for Spiking Neural Network Realization
by: Razmkhah, Sasan, et al.
Published: (2023)

A 0.5-V Linear Neuromorphic Voltage-to-Spike Encoder Using a Bulk-Driven Transconductor
by: Akbari, Meysam, et al.
Published: (2026)

In-Memory ADC-Based Nonlinear Activation Quantization for Efficient In-Memory Computing
by: Dong, Shuai, et al.
Published: (2026)

Memory Wall is not gone: A Critical Outlook on Memory Architecture in Digital Neuromorphic Computing
by: Yousefzadeh, Amirreza, et al.
Published: (2026)

Hardware-Friendly Implementation of Physical Reservoir Computing with CMOS-based Time-domain Analog Spiking Neurons
by: Kimura, Nanako, et al.
Published: (2024)

E2ATST: A Temporal-Spatial Optimized Energy-Efficient Architecture for Training Spiking Transformer
by: Ma, Yunhao, et al.
Published: (2025)

Analysis of a Memcapacitor-Based for Neural Network Accelerator Framework
by: Singh, Ankur, et al.
Published: (2025)

Trilinear Compute-in-Memory Architecture for Energy-Efficient Transformer Acceleration
by: Mia, Md Zesun Ahmed, et al.
Published: (2026)

ReLANCE: A Resource-Efficient Low-Latency Cortical Neural Acceleration Engine
by: Kumar, Sonu, et al.
Published: (2025)

IzhiRISC-V -- a RISC-V-based Processor with Custom ISA Extension for Spiking Neuron Networks Processing with Izhikevich Neurons
by: Szczerek, Wiktor J., et al.
Published: (2025)

Energy-Aware FPGA Implementation of Spiking Neural Network with LIF Neurons
by: Ali, Asmer Hamid, et al.
Published: (2024)

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator
by: Yang, Junyi, et al.
Published: (2026)

LoAS: Fully Temporal-Parallel Dataflow for Dual-Sparse Spiking Neural Networks
by: Yin, Ruokai, et al.
Published: (2024)

Towards 3D Acceleration for low-power Mixture-of-Experts and Multi-Head Attention Spiking Transformers
by: Xu, Boxun, et al.
Published: (2024)

Full Feature Spiking Neural Network Simulation on Micro-Controllers for Neuromorphic Applications at the Edge
by: Niedermeier, L., et al.
Published: (2026)

FeNN: A RISC-V vector processor for Spiking Neural Network acceleration
by: Aizaz, Zainab, et al.
Published: (2025)

HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators
by: Vaziri, Mobin, et al.
Published: (2024)

Functional Stability of Software-Hardware Neural Network Implementation The NeuroComp Project
by: Oleksii, Bychkov, et al.
Published: (2025)

Hardware-Aware Model Design and Training of Silicon-based Analog Neural Networks
by: Filippeschi, Giulio, et al.
Published: (2025)

Spiker+: a framework for the generation of efficient Spiking Neural Networks FPGA accelerators for inference at the edge
by: Carpegna, Alessio, et al.
Published: (2024)

Wet TinyML: Chemical Neural Network Using Gene Regulation and Cell Plasticity
by: Somathilaka, Samitha, et al.
Published: (2024)

Catwalk: Unary Top-K for Efficient Ramp-No-Leak Neuron Design for Temporal Neural Networks
by: Lister, Devon, et al.
Published: (2025)

Efficient Implementation of a Multi-Layer Gradient-Free Online-Trainable Spiking Neural Network on FPGA
by: Mehrabi, Ali, et al.
Published: (2023)

SAGA: Synthesis Augmentation with Genetic Algorithms for In-Memory Sequence Optimization
by: Robins, Andey, et al.
Published: (2024)

Stochastic Spiking Attention: Accelerating Attention with Stochastic Computing in Spiking Networks
by: Song, Zihang, et al.
Published: (2024)

NeuroFlex: Column-Exact ANN-SNN Co-Execution Accelerator with Cost-Guided Scheduling
by: Manjunath, Varun, et al.
Published: (2025)

FlexNN: A Dataflow-aware Flexible Deep Learning Accelerator for Energy-Efficient Edge Devices
by: Raha, Arnab, et al.
Published: (2024)

Flexi-NeurA: A Configurable Neuromorphic Accelerator with Adaptive Bit-Precision Exploration for Edge SNNs
by: Farahani, Mohammad, et al.
Published: (2026)

Near-Memory Architecture for Threshold-Ordinal Surface-Based Corner Detection of Event Cameras
by: Shang, Hongyang, et al.
Published: (2025)

Genetic Quantization-Aware Approximation for Non-Linear Operations in Transformers
by: Dong, Pingcheng, et al.
Published: (2024)

Darwin3: A large-scale neuromorphic chip with a Novel ISA and On-Chip Learning
by: Ma, De, et al.
Published: (2023)