Copertina

Exploiting temporal parallelism for LSTM Autoencoder acceleration on FPGA

Fuente: arXiv

Salvato in:

Dettagli Bibliografici
Autori principali:	Leftheriotis, Aimilios, Masouros, Dimosthenis, Soudris, Dimitrios, Theodoridis, George
Natura:	Preprint
Pubblicazione:	2026
Soggetti:	Hardware Architecture Machine Learning
Accesso online:	Acceder al recurso
Tags:	Aggiungi Tag Nessun Tag, puoi essere il primo ad aggiungerne!!

Documenti analoghi

Optimizing GEMM for Energy and Performance on Versal ACAP Architectures
di: Papalamprou, Ilias, et al.
Pubblicazione: (2025)

SLO-aware GPU Frequency Scaling for Energy Efficient LLM Inference Serving
di: Kakolyris, Andreas Kosmas, et al.
Pubblicazione: (2024)

Decoupled Access-Execute enabled DVFS for tinyML deployments on STM32 microcontrollers
di: Alvanaki, Elisavet Lydia, et al.
Pubblicazione: (2024)

Post-Quantum and Blockchain-Based Attestation for Trusted FPGAs in B5G Networks
di: Papalamprou, Ilias, et al.
Pubblicazione: (2025)

TransAxx: Efficient Transformers with Approximate Computing
di: Danopoulos, Dimitrios, et al.
Pubblicazione: (2024)

TF2AIF: Facilitating development and deployment of accelerated AI models on the cloud-edge continuum
di: Leftheriotis, Aimilios, et al.
Pubblicazione: (2024)

MaRVIn: A Cross-Layer Mixed-Precision RISC-V Framework for DNN Inference, from ISA Extension to Hardware Acceleration
di: Armeniakos, Giorgos, et al.
Pubblicazione: (2025)

MAx-DNN: Multi-Level Arithmetic Approximation for Energy-Efficient DNN Hardware Accelerators
di: Leon, Vasileios, et al.
Pubblicazione: (2025)

Towards Employing FPGA and ASIP Acceleration to Enable Onboard AI/ML in Space Applications
di: Leon, Vasileios, et al.
Pubblicazione: (2025)

Evaluating Four FPGA-accelerated Space Use Cases based on Neural Network Algorithms for On-board Inference
di: Antunes, Pedro, et al.
Pubblicazione: (2026)

Exploring FPGA designs for MX and beyond
di: Samson, Ebby, et al.
Pubblicazione: (2024)

PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference
di: Andronic, Marta, et al.
Pubblicazione: (2023)

Low-latency machine learning FPGA accelerator for multi-qubit-state discrimination
di: Gautam, Pradeep Kumar, et al.
Pubblicazione: (2024)

FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks
di: Leon, Vasileios, et al.
Pubblicazione: (2025)

Development of High-Performance DSP Algorithms on the European Rad-Hard NG-ULTRA SoC FPGA
di: Leon, Vasileios, et al.
Pubblicazione: (2024)

Memory-Efficient FPGA Implementation of Stochastic Simulated Annealing
di: Shin, Duckgyu, et al.
Pubblicazione: (2026)

PDA-LSTM: Knowledge-driven page data arrangement based on LSTM for LCM supression in QLC 3D NAND flash memories
di: Li, Qianhui, et al.
Pubblicazione: (2025)

Hardware-Aware Neural Dropout Search for Reliable Uncertainty Prediction on FPGA
di: Zhang, Zehuan, et al.
Pubblicazione: (2024)

An FPGA-Based Reconfigurable Accelerator for Convolution-Transformer Hybrid EfficientViT
di: Shao, Haikuo, et al.
Pubblicazione: (2024)

FPGA-Enabled Machine Learning Applications in Earth Observation: A Systematic Review
di: Léonard, Cédric, et al.
Pubblicazione: (2025)

An FPGA-Based Accelerator Enabling Efficient Support for CNNs with Arbitrary Kernel Sizes
di: Wang, Miaoxin, et al.
Pubblicazione: (2024)

Efficient FPGA Implementation of Time-Domain Popcount for Low-Complexity Machine Learning
di: Duan, Shengyu, et al.
Pubblicazione: (2025)

FPGA Co-Design for Efficient N:M Sparse and Quantized Model Inference
di: Hsieh, Fen-Yu, et al.
Pubblicazione: (2025)

InstantFT: An FPGA-Based Runtime Subsecond Fine-tuning of CNN Models
di: Sugiura, Keisuke, et al.
Pubblicazione: (2025)

A Persistent-State Dataflow Accelerator for Memory-Bound Linear Attention Decode on FPGA
di: Gupta, Neelesh, et al.
Pubblicazione: (2026)

A Cost-Efficient FPGA Implementation of Tiny Transformer Model using Neural ODE
di: Okubo, Ikumi, et al.
Pubblicazione: (2024)

Cross-Layer Co-Optimized LSTM Accelerator for Real-Time Gait Analysis
di: Ahmadilivani, Mohammad Hasan, et al.
Pubblicazione: (2026)

PEFSL: A deployment Pipeline for Embedded Few-Shot Learning on a FPGA SoC
di: Ribeiro, Lucas Grativol, et al.
Pubblicazione: (2024)

A Bespoke Design Approach to Low-Power Printed Microprocessors for Machine Learning Applications
di: Chaidos, Panagiotis, et al.
Pubblicazione: (2025)

MPAI: A Co-Processing Architecture with MPSoC & AI Accelerators for Vision Applications in Space
di: Leon, Vasileios, et al.
Pubblicazione: (2024)

An FPGA-Based SoC Architecture with a RISC-V Controller for Energy-Efficient Temporal-Coding Spiking Neural Networks
di: Sekonji, Mohammad Javad, et al.
Pubblicazione: (2026)

Taming the Exponential: A Fast Softmax Surrogate for Integer-Native Edge Inference
di: Danopoulos, Dimitrios, et al.
Pubblicazione: (2026)

Continuous-Flow Data-Rate-Aware CNN Inference on FPGA
di: Habermann, Tobias, et al.
Pubblicazione: (2026)

FPGA Divide-and-Conquer Placement using Deep Reinforcement Learning
di: Wang, Shang, et al.
Pubblicazione: (2024)

ShortCircuit: AlphaZero-Driven Circuit Design
di: Tsaras, Dimitrios, et al.
Pubblicazione: (2024)

HARFLOW3D: A Latency-Oriented 3D-CNN Accelerator Toolflow for HAR on FPGA Devices
di: Toupas, Petros, et al.
Pubblicazione: (2023)

PolyLUT-Add: FPGA-based LUT Inference with Wide Inputs
di: Lou, Binglei, et al.
Pubblicazione: (2024)

FPGA-based Acceleration for Convolutional Neural Networks: A Comprehensive Review
di: Jiang, Junye, et al.
Pubblicazione: (2025)

NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions
di: Andronic, Marta, et al.
Pubblicazione: (2024)

Accelerating AI and Computer Vision for Satellite Pose Estimation on the Intel Myriad X Embedded SoC
di: Leon, Vasileios, et al.
Pubblicazione: (2024)