QiMeng-CodeV-SVA: Training Specialized LLMs for Hardware Assertion Generation via RTL-Grounded Bidirectional Data Synthesis
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arXiv
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| Autori principali: | , , , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2026
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| _version_ | 1866910053638864896 |
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| author | Wu, Yutong Cao, Chenrui Jin, Pengwei Huang, Di Zhang, Rui Zhang, Xishan Du, Zidong Guo, Qi Hu, Xing |
| author_facet | Wu, Yutong Cao, Chenrui Jin, Pengwei Huang, Di Zhang, Rui Zhang, Xishan Du, Zidong Guo, Qi Hu, Xing |
| contents | SystemVerilog Assertions (SVAs) are crucial for hardware verification. Recent studies leverage general-purpose LLMs to translate natural language properties to SVAs (NL2SVA), but they perform poorly due to limited data. We propose a data synthesis framework to tackle two challenges: the scarcity of high-quality real-world SVA corpora and the lack of reliable methods to determine NL-SVA semantic equivalence. For the former, large-scale open-source RTLs are used to guide LLMs to generate real-world SVAs; for the latter, bidirectional translation serves as a data selection method. With the synthesized data, we train CodeV-SVA, a series of SVA generation models. Notably, CodeV-SVA-14B achieves 75.8% on NL2SVA-Human and 84.0% on NL2SVA-Machine in Func.@1, matching or exceeding advanced LLMs like GPT-5 and DeepSeek-R1. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2603_14239 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | QiMeng-CodeV-SVA: Training Specialized LLMs for Hardware Assertion Generation via RTL-Grounded Bidirectional Data Synthesis Wu, Yutong Cao, Chenrui Jin, Pengwei Huang, Di Zhang, Rui Zhang, Xishan Du, Zidong Guo, Qi Hu, Xing Computation and Language Artificial Intelligence Hardware Architecture Machine Learning SystemVerilog Assertions (SVAs) are crucial for hardware verification. Recent studies leverage general-purpose LLMs to translate natural language properties to SVAs (NL2SVA), but they perform poorly due to limited data. We propose a data synthesis framework to tackle two challenges: the scarcity of high-quality real-world SVA corpora and the lack of reliable methods to determine NL-SVA semantic equivalence. For the former, large-scale open-source RTLs are used to guide LLMs to generate real-world SVAs; for the latter, bidirectional translation serves as a data selection method. With the synthesized data, we train CodeV-SVA, a series of SVA generation models. Notably, CodeV-SVA-14B achieves 75.8% on NL2SVA-Human and 84.0% on NL2SVA-Machine in Func.@1, matching or exceeding advanced LLMs like GPT-5 and DeepSeek-R1. |
| title | QiMeng-CodeV-SVA: Training Specialized LLMs for Hardware Assertion Generation via RTL-Grounded Bidirectional Data Synthesis |
| topic | Computation and Language Artificial Intelligence Hardware Architecture Machine Learning |
| url | https://arxiv.org/abs/2603.14239 |