ODIN-Based CPU-GPU Architecture with Replay-Driven Simulation and Emulation
Fuente:
arXiv
Saved in:
| Main Authors: | Dorairaj, Nij, Chatterjee, Debabrata, Wang, Hong, Jiang, Hong, Saxena, Alankar, Koker, Altug, Lim, Thiam Ern, Teoh, Cathrane, Loo, Chuan Yin, Shomar, Bishara, Lester, Anthony |
|---|---|
| Format: | Preprint |
| Published: |
2026
|
| Subjects: | |
| Online Access: | |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
Confidential Computing on Heterogeneous CPU-GPU Systems: Survey and Future Directions
by: Wang, Qifan, et al.
Published: (2024)
by: Wang, Qifan, et al.
Published: (2024)
Characterizing CPU-Induced Slowdowns in Multi-GPU LLM Inference
by: Chung, Euijun, et al.
Published: (2026)
by: Chung, Euijun, et al.
Published: (2026)
Differentiable Initialization-Accelerated CPU-GPU Hybrid Combinatorial Scheduling
by: Liu, Mingju, et al.
Published: (2026)
by: Liu, Mingju, et al.
Published: (2026)
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System
by: Söderström, Johan, et al.
Published: (2025)
by: Söderström, Johan, et al.
Published: (2025)
Confidential LLM Inference: Performance and Cost Across CPU and GPU TEEs
by: Chrapek, Marcin, et al.
Published: (2025)
by: Chrapek, Marcin, et al.
Published: (2025)
The Anatomy of Silent Data Corruption: GPU Error Pattern Study and Modeling Guidance
by: Tung, Chung-Hsuan, et al.
Published: (2026)
by: Tung, Chung-Hsuan, et al.
Published: (2026)
LLM-PRISM: Characterizing Silent Data Corruption from Permanent GPU Faults in LLM Training
by: Tyagi, Abhishek, et al.
Published: (2026)
by: Tyagi, Abhishek, et al.
Published: (2026)
Characterizing and Optimizing LLM Inference Workloads on CPU-GPU Coupled Architectures
by: Vellaisamy, Prabhu, et al.
Published: (2025)
by: Vellaisamy, Prabhu, et al.
Published: (2025)
Further Evaluations of a Didactic CPU Visual Simulator (CPUVSIM)
by: Cortinovis, Renato, et al.
Published: (2024)
by: Cortinovis, Renato, et al.
Published: (2024)
Evaluation of computational and energy performance in matrix multiplication algorithms on CPU and GPU using MKL, cuBLAS and SYCL
by: Torres, L. A., et al.
Published: (2024)
by: Torres, L. A., et al.
Published: (2024)
Taming Asynchronous CPU-GPU Coupling for Frequency-aware Latency Estimation on Mobile Edge
by: Chen, Jiesong, et al.
Published: (2026)
by: Chen, Jiesong, et al.
Published: (2026)
Branch Prediction in Hardcaml for a RISC-V 32im CPU
by: Saveau, Alex
Published: (2023)
by: Saveau, Alex
Published: (2023)
SPEC CPU2026: Characterization, Representativeness, and Cross-Suite Comparison
by: Li, Ruihao, et al.
Published: (2026)
by: Li, Ruihao, et al.
Published: (2026)
Extending CPU-less parallel execution of lambda calculus in digital logic with lists and arithmetic
by: Fitchett, Harry, et al.
Published: (2026)
by: Fitchett, Harry, et al.
Published: (2026)
FPGA-based Hyrbid Memory Emulation System
by: Wen, Fei, et al.
Published: (2020)
by: Wen, Fei, et al.
Published: (2020)
ISAAC: Intelligent, Scalable, Agile, and Accelerated CPU Verification via LLM-aided FPGA Parallelism
by: Sun, Jialin, et al.
Published: (2025)
by: Sun, Jialin, et al.
Published: (2025)
QiMeng-CPU-v2: Automated Superscalar Processor Design by Learning Data Dependencies
by: Cheng, Shuyao, et al.
Published: (2025)
by: Cheng, Shuyao, et al.
Published: (2025)
CXL-GPU: Pushing GPU Memory Boundaries with the Integration of CXL Technologies
by: Gouk, Donghyun, et al.
Published: (2025)
by: Gouk, Donghyun, et al.
Published: (2025)
EMiX: Emulating Beyond Single-FPGA Limits
by: Kropotov, Alexander, et al.
Published: (2026)
by: Kropotov, Alexander, et al.
Published: (2026)
CPU Simulation with Ranked Set Sampling and Repeated Subsampling
by: Ekman, Magnus
Published: (2026)
by: Ekman, Magnus
Published: (2026)
CPU Simulation Using Two-Phase Stratified Sampling
by: Ekman, Magnus
Published: (2026)
by: Ekman, Magnus
Published: (2026)
EdgeLLM: A Highly Efficient CPU-FPGA Heterogeneous Edge Accelerator for Large Language Models
by: Huang, Mingqiang, et al.
Published: (2024)
by: Huang, Mingqiang, et al.
Published: (2024)
AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications
by: Yahya, Jawad Haj, et al.
Published: (2022)
by: Yahya, Jawad Haj, et al.
Published: (2022)
Efficient LLM inference solution on Intel GPU
by: Wu, Hui, et al.
Published: (2023)
by: Wu, Hui, et al.
Published: (2023)
Towards CPU Performance Prediction: New Challenge Benchmark Dataset and Novel Approach
by: Liu, Xiaoman
Published: (2024)
by: Liu, Xiaoman
Published: (2024)
SwarmIO: Towards 100 Million IOPS SSD Emulation for Next-generation GPU-centric Storage Systems
by: Kim, Hyeseong, et al.
Published: (2026)
by: Kim, Hyeseong, et al.
Published: (2026)
Sandwich: Joint Configuration Search and Hot-Switching for Efficient CPU LLM Serving
by: Zhao, Juntao, et al.
Published: (2025)
by: Zhao, Juntao, et al.
Published: (2025)
CPU-Based Layout Design for Picker-to-Parts Pallet Warehouses
by: Looms, Timo, et al.
Published: (2025)
by: Looms, Timo, et al.
Published: (2025)
RoboGPU: Accelerating GPU Collision Detection for Robotics
by: Liu, Lufei, et al.
Published: (2026)
by: Liu, Lufei, et al.
Published: (2026)
EdgeMM: Multi-Core CPU with Heterogeneous AI-Extension and Activation-aware Weight Pruning for Multimodal LLMs at Edge
by: Bai, Kangbo, et al.
Published: (2025)
by: Bai, Kangbo, et al.
Published: (2025)
Analyzing Modern NVIDIA GPU cores
by: Huerta, Rodrigo, et al.
Published: (2025)
by: Huerta, Rodrigo, et al.
Published: (2025)
FERIVer: An FPGA-assisted Emulated Framework for RTL Verification of RISC-V Processors
by: Qin, Kun, et al.
Published: (2025)
by: Qin, Kun, et al.
Published: (2025)
ArchPower: Dataset for Architecture-Level Power Modeling of Modern CPU Design
by: Zhang, Qijun, et al.
Published: (2025)
by: Zhang, Qijun, et al.
Published: (2025)
Late Breaking Result: FPGA-Based Emulation and Fault Injection for CNN Inference Accelerators
by: Masar, Filip, et al.
Published: (2025)
by: Masar, Filip, et al.
Published: (2025)
Late Breaking Results: CHESSY: Coupled Hybrid Emulation with SystemC-FPGA Synchronization
by: Ruotolo, Lorenzo, et al.
Published: (2026)
by: Ruotolo, Lorenzo, et al.
Published: (2026)
FPGA-based Emulation and Device-Side Management for CXL-based Memory Tiering Systems
by: Chen, Yiqi, et al.
Published: (2025)
by: Chen, Yiqi, et al.
Published: (2025)
FASE: FPGA-Assisted Syscall Emulation for Rapid End-to-End Processor Performance Validation
by: Meng, Chengzhen, et al.
Published: (2025)
by: Meng, Chengzhen, et al.
Published: (2025)
Design of a GPU with Heterogeneous Cores for Graphics
by: Tomás, Aurora, et al.
Published: (2026)
by: Tomás, Aurora, et al.
Published: (2026)
Benchmarking and Dissecting the Nvidia Hopper GPU Architecture
by: Luo, Weile, et al.
Published: (2024)
by: Luo, Weile, et al.
Published: (2024)
COOK Access Control on an embedded Volta GPU
by: Lesage, Benjamin, et al.
Published: (2024)
by: Lesage, Benjamin, et al.
Published: (2024)
Similar Items
-
Confidential Computing on Heterogeneous CPU-GPU Systems: Survey and Future Directions
by: Wang, Qifan, et al.
Published: (2024) -
Characterizing CPU-Induced Slowdowns in Multi-GPU LLM Inference
by: Chung, Euijun, et al.
Published: (2026) -
Differentiable Initialization-Accelerated CPU-GPU Hybrid Combinatorial Scheduling
by: Liu, Mingju, et al.
Published: (2026) -
Anatomy of the gem5 Simulator: AtomicSimpleCPU, TimingSimpleCPU, O3CPU, and Their Interaction with the Ruby Memory System
by: Söderström, Johan, et al.
Published: (2025) -
Confidential LLM Inference: Performance and Cost Across CPU and GPU TEEs
by: Chrapek, Marcin, et al.
Published: (2025)