SYMDIREC: A Neuro-Symbolic Divide-Retrieve-Conquer Framework for Enhanced RTL Synthesis and Summarization
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| Main Authors: | , , , , , , , |
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| Format: | Preprint |
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2026
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| _version_ | 1866908896515325952 |
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| author | Vijayaraghavan, Prashanth Nitsure, Apoorva Shi, Luyao Mackin, Charles Jadhav, Ashutosh Beymer, David Degan, Ehsan Mukherjee, Vandana |
| author_facet | Vijayaraghavan, Prashanth Nitsure, Apoorva Shi, Luyao Mackin, Charles Jadhav, Ashutosh Beymer, David Degan, Ehsan Mukherjee, Vandana |
| contents | Register-Transfer Level (RTL) synthesis and summarization are central to hardware design automation but remain challenging for Large Language Models (LLMs) due to rigid HDL syntax, limited supervision, and weak alignment with natural language. Existing prompting and retrieval-augmented generation (RAG) methods have not incorporated symbolic planning, limiting their structural precision. We introduce SYMDIREC, a neuro-symbolic framework that decomposes RTL tasks into symbolic subgoals, retrieves relevant code via a fine-tuned retriever, and assembles verified outputs through LLM reasoning. Supporting both Verilog and VHDL without LLM fine-tuning, SYMDIREC achieves ~20% higher Pass@1 rates for synthesis and 15-20% ROUGE-L improvements for summarization over prompting and RAG baselines, demonstrating the benefits of symbolic guidance in RTL tasks. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2603_17208 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | SYMDIREC: A Neuro-Symbolic Divide-Retrieve-Conquer Framework for Enhanced RTL Synthesis and Summarization Vijayaraghavan, Prashanth Nitsure, Apoorva Shi, Luyao Mackin, Charles Jadhav, Ashutosh Beymer, David Degan, Ehsan Mukherjee, Vandana Computation and Language Programming Languages Register-Transfer Level (RTL) synthesis and summarization are central to hardware design automation but remain challenging for Large Language Models (LLMs) due to rigid HDL syntax, limited supervision, and weak alignment with natural language. Existing prompting and retrieval-augmented generation (RAG) methods have not incorporated symbolic planning, limiting their structural precision. We introduce SYMDIREC, a neuro-symbolic framework that decomposes RTL tasks into symbolic subgoals, retrieves relevant code via a fine-tuned retriever, and assembles verified outputs through LLM reasoning. Supporting both Verilog and VHDL without LLM fine-tuning, SYMDIREC achieves ~20% higher Pass@1 rates for synthesis and 15-20% ROUGE-L improvements for summarization over prompting and RAG baselines, demonstrating the benefits of symbolic guidance in RTL tasks. |
| title | SYMDIREC: A Neuro-Symbolic Divide-Retrieve-Conquer Framework for Enhanced RTL Synthesis and Summarization |
| topic | Computation and Language Programming Languages |
| url | https://arxiv.org/abs/2603.17208 |