An FPGA-Based SoC Architecture with a RISC-V Controller for Energy-Efficient Temporal-Coding Spiking Neural Networks

Fuente: arXiv

Saved in:

Bibliographic Details
Main Authors:	Sekonji, Mohammad Javad, Mahani, Ali, Mirsadeghi, Maryam, Taheri, Mahdi
Format:	Preprint
Published:	2026
Subjects:	Hardware Architecture Machine Learning
Online Access:	Acceder al recurso
Tags:	Add Tag No Tags, Be the first to tag this record!

Internet

https://arxiv.org/abs/2603.18054