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Hauptverfasser: Ping, Heng, Zhang, Peiyu, Wang, Zhenkun, Li, Shixuan, Cheng, Anzhe, Yang, Wei, Bogdan, Paul, Nazarian, Shahin
Format: Preprint
Veröffentlicht: 2026
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Online-Zugang:https://arxiv.org/abs/2603.19333
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author Ping, Heng
Zhang, Peiyu
Wang, Zhenkun
Li, Shixuan
Cheng, Anzhe
Yang, Wei
Bogdan, Paul
Nazarian, Shahin
author_facet Ping, Heng
Zhang, Peiyu
Wang, Zhenkun
Li, Shixuan
Cheng, Anzhe
Yang, Wei
Bogdan, Paul
Nazarian, Shahin
contents Applying large language models (LLMs) to RTL code optimization for improved power, performance, and area (PPA) faces two key challenges: ensuring functional correctness of optimized designs despite LLM hallucination, and systematically prioritizing power reduction within the multi-objective PPA trade-off space. We propose POET (Power-Oriented Evolutionary Tuning), a framework that addresses both challenges. For functional correctness, POET introduces a differential-testing-based testbench generation pipeline that treats the original design as a functional oracle, using deterministic simulation to produce golden references and eliminating LLM hallucination from the verification process. For PPA optimization, POET employs an LLM-driven evolutionary mechanism with non-dominated sorting, power-first intra-level ranking, and proportional survivor selection to steer the search toward the low-power region of the Pareto front without manual weight tuning. Evaluated on the RTL-OPT benchmark across 40 diverse RTL designs, POET achieves 100% functional correctness, the best power on all 40 designs, and competitive area and delay improvements.
format Preprint
id arxiv_https___arxiv_org_abs_2603_19333
institution arXiv
publishDate 2026
record_format arxiv
spellingShingle POET: Power-Oriented Evolutionary Tuning for LLM-Based RTL PPA Optimization
Ping, Heng
Zhang, Peiyu
Wang, Zhenkun
Li, Shixuan
Cheng, Anzhe
Yang, Wei
Bogdan, Paul
Nazarian, Shahin
Hardware Architecture
Artificial Intelligence
Applying large language models (LLMs) to RTL code optimization for improved power, performance, and area (PPA) faces two key challenges: ensuring functional correctness of optimized designs despite LLM hallucination, and systematically prioritizing power reduction within the multi-objective PPA trade-off space. We propose POET (Power-Oriented Evolutionary Tuning), a framework that addresses both challenges. For functional correctness, POET introduces a differential-testing-based testbench generation pipeline that treats the original design as a functional oracle, using deterministic simulation to produce golden references and eliminating LLM hallucination from the verification process. For PPA optimization, POET employs an LLM-driven evolutionary mechanism with non-dominated sorting, power-first intra-level ranking, and proportional survivor selection to steer the search toward the low-power region of the Pareto front without manual weight tuning. Evaluated on the RTL-OPT benchmark across 40 diverse RTL designs, POET achieves 100% functional correctness, the best power on all 40 designs, and competitive area and delay improvements.
title POET: Power-Oriented Evolutionary Tuning for LLM-Based RTL PPA Optimization
topic Hardware Architecture
Artificial Intelligence
url https://arxiv.org/abs/2603.19333