:: Library Catalog

Cover Image

Saved in:

Bibliographic Details
Main Authors:	Yuhala, Peterson, Mwaisela, Mpoki, Felber, Pascal, Schiavoni, Valerio
Format:	Preprint
Published:	2026
Subjects:	Emerging Technologies
Online Access:	https://arxiv.org/abs/2603.23762
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

IM-PIR: In-Memory Private Information Retrieval
by: Mwaisela, Mpoki, et al.
Published: (2025)

Evaluating the Potential of In-Memory Processing to Accelerate Homomorphic Encryption
by: Mwaisela, Mpoki, et al.
Published: (2024)

Plinius: Secure and Persistent Machine Learning Model Training
by: Yuhala, Peterson, et al.
Published: (2021)

PhD Forum: Efficient Privacy-Preserving Processing via Memory-Centric Computing
by: Mwaisela, Mpoki
Published: (2024)

PIM or CXL-PIM? Understanding Architectural Trade-offs Through Large-Scale Benchmarking
by: Lee, I-Ting, et al.
Published: (2025)

Dataflow-Aware PIM-Enabled Manycore Architecture for Deep Learning Workloads
by: Sharma, Harsh, et al.
Published: (2024)

PIM-AI: A Novel Architecture for High-Efficiency LLM Inference
by: Ortega, Cristobal, et al.
Published: (2024)

Single-Ferroelectric Memcapacitor-Based Time-Domain Content-Addressable Memory for Highly Precise Distance Function Computation
by: Ryu, Minjeong, et al.
Published: (2025)

On Error Correction for Nonvolatile Processing-In-Memory
by: Cılasun, Hüsrev, et al.
Published: (2022)

A Collaborative PIM Computing Optimization Framework for Multi-Tenant DNN
by: Li, Bojing, et al.
Published: (2024)

Gain Cell-Based Analog Content Addressable Memory for Dynamic Associative tasks in AI
by: Manea, Paul-Philipp, et al.
Published: (2024)

TAP-CAM: A Tunable Approximate Matching Engine based on Ferroelectric Content Addressable Memory
by: Ni, Chenyu, et al.
Published: (2025)

Sparsity-Aware Optimization of In-Memory Bayesian Binary Neural Network Accelerators
by: Katti, Prabodh, et al.
Published: (2024)

Content Addressable Memory Design with Reference Resistor for Improved Search Resolution
by: Narla, Siri, et al.
Published: (2025)

Realizing RF Wavefront Copying with RIS for Future Extended Reality Applications
by: Tsimpoukis, Stavros, et al.
Published: (2024)

H3PIMAP: A Heterogeneity-Aware Multi-Objective DNN Mapping Framework on Electronic-Photonic Processing-in-Memory Architectures
by: Yin, Ziang, et al.
Published: (2025)

Modeling and Simulation Frameworks for Processing-in-Memory Architectures
by: Aghaei, Mahdi, et al.
Published: (2025)

Energy-Efficient Cryogenic Ternary Content Addressable Memory using Ferroelectric SQUID
by: Alam, Shamiul, et al.
Published: (2024)

High Clockrate Free-space Optical In-Memory Computing
by: Liang, Yuanhao, et al.
Published: (2025)

High-Quality Iterative Logic Compiler for In-Memory SIMD Computation with Tight Coupling of Synthesis and Scheduling
by: Qian, Xingyue, et al.
Published: (2024)

A Fast and Energy-Efficient Latch-Based Memristive Analog Content-Addressable Memory
by: Manea, Paul-Philipp, et al.
Published: (2026)

CrossNAS: A Cross-Layer Neural Architecture Search Framework for PIM Systems
by: Amin, Md Hasibul, et al.
Published: (2025)

Cross-layer Modeling and Design of Content Addressable Memories in Advanced Technology Nodes for Similarity Search
by: Narla, Siri, et al.
Published: (2024)

Content‐Aware Routing Algorithms in WSN for Energy‐Efficient Content Delivery Through Clustering With Hybridized Optimization Aided Shortest Path Selection
by: Impa Bennuru Huliyappa Gowda, et al.
Published: (2025)

Streamlining CXL Adoption for Hyperscale Efficiency
by: Arelakis, Angelos, et al.
Published: (2024)

Enhancing Test Efficiency through Automated ATPG-Aware Lightweight Scan Instrumentation
by: Paria, Sudipta, et al.
Published: (2025)

Computing High-Degree Polynomial Gradients in Memory
by: Bhattacharya, T., et al.
Published: (2024)

In-Memory Mirroring: Cloning Without Reading
by: Singh, Simranjeet, et al.
Published: (2024)

Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory
by: Chen, Guan-Cheng, et al.
Published: (2025)

Negative-Voltage-Enabled Energy Efficient Nonvolatile Memories And In-Memory Computing Based On 2D Piezoelectric Transistors
by: Victor, Jeffry, et al.
Published: (2026)

Computing In Spintronic Memory: A Thermal Perspective
by: Miller, Patrick, et al.
Published: (2026)

SuperSNN: A Hardware-Aware Framework for Physically Realizable, High-Performance Superconducting Spiking Neural Network Chips
by: Song, Changxu, et al.
Published: (2025)

Parameter Training Efficiency Aware Resource Allocation for AIGC in Space-Air-Ground Integrated Networks
by: Qian, Liangxin, et al.
Published: (2024)

A 5T-2MTJ STT-assisted Spin Orbit Torque based Ternary Content Addressable Memory for Hardware Accelerators
by: Narla, Siri, et al.
Published: (2024)

Tunable Synaptic Working Memory with Volatile Memristive Devices
by: Ricci, Saverio, et al.
Published: (2023)

Resistive Memory for Computing and Security: Algorithms, Architectures, and Platforms
by: Singh, Simranjeet, et al.
Published: (2024)

Count2Multiply: Reliable In-Memory High-Radix Counting
by: de Lima, João Paulo Cardoso, et al.
Published: (2024)

Stateful Logic In-Memory Using Gain-Cell eDRAM
by: Hoffer, Barak, et al.
Published: (2025)

Ferroelectric FET-based Logic-in-Memory Encoder for Hyperdimensional Computing
by: Chakraborty, Arka, et al.
Published: (2025)

Nonvolatile Electrochemical Random-Access Memory Under Short Circuit
by: Kim, Diana, et al.
Published: (2022)