RePart: Efficient Hypergraph Partitioning with Logic Replication Optimization for Multi-FPGA System
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arXiv
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| Autori principali: | , , , , , , |
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| Natura: | Preprint |
| Pubblicazione: |
2026
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| _version_ | 1866912995333898240 |
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| author | Fu, Zizhuo Zhou, Yifan Lu, Zhaoxin Sun, Guangyu Wang, Runsheng Li, Meng Lin, Yibo |
| author_facet | Fu, Zizhuo Zhou, Yifan Lu, Zhaoxin Sun, Guangyu Wang, Runsheng Li, Meng Lin, Yibo |
| contents | Multi-FPGA systems (MFS) are widely adopted for VLSI emulation and rapid prototyping. In an MFS, FPGAs connect only to a limited number of neighbors through bandwidth-constrained links, so inter-FPGA communication cost depends on network topology. This setting exposes two fundamental limitations of existing MFS-aware partitioning methods: conventional hypergraph partitioners focus solely on cut size and ignore topological structure, and they leave substantial FPGA resources unused due to conservative balance margins. We present RePart, a fully customized multilevel hypergraph partitioning framework for MFS that integrates logic replication with topology-aware optimization. RePart introduces three coordinated innovations across the multilevel pipeline: FPGA-aware dynamic coarsening, heat-value guided assignment, and replication-deletion supported refinement. Extensive experiments on the Titan23 and EDA Elite Challenge Contest benchmarks show that RePart reduces total hop distance by 52.3% on average over state-of-the-art hypergraph partitioners with an 11.1x speedup, and outperforms the EDA Elite Challenge winners. Code is available at: https://github.com/Welement-zyf/RePart. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_00780 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | RePart: Efficient Hypergraph Partitioning with Logic Replication Optimization for Multi-FPGA System Fu, Zizhuo Zhou, Yifan Lu, Zhaoxin Sun, Guangyu Wang, Runsheng Li, Meng Lin, Yibo Hardware Architecture Multi-FPGA systems (MFS) are widely adopted for VLSI emulation and rapid prototyping. In an MFS, FPGAs connect only to a limited number of neighbors through bandwidth-constrained links, so inter-FPGA communication cost depends on network topology. This setting exposes two fundamental limitations of existing MFS-aware partitioning methods: conventional hypergraph partitioners focus solely on cut size and ignore topological structure, and they leave substantial FPGA resources unused due to conservative balance margins. We present RePart, a fully customized multilevel hypergraph partitioning framework for MFS that integrates logic replication with topology-aware optimization. RePart introduces three coordinated innovations across the multilevel pipeline: FPGA-aware dynamic coarsening, heat-value guided assignment, and replication-deletion supported refinement. Extensive experiments on the Titan23 and EDA Elite Challenge Contest benchmarks show that RePart reduces total hop distance by 52.3% on average over state-of-the-art hypergraph partitioners with an 11.1x speedup, and outperforms the EDA Elite Challenge winners. Code is available at: https://github.com/Welement-zyf/RePart. |
| title | RePart: Efficient Hypergraph Partitioning with Logic Replication Optimization for Multi-FPGA System |
| topic | Hardware Architecture |
| url | https://arxiv.org/abs/2604.00780 |