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| Main Authors: | , , , , , , , , |
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| Format: | Preprint |
| Published: |
2026
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| Subjects: | |
| Online Access: | https://arxiv.org/abs/2604.02266 |
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| _version_ | 1866918425746472960 |
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| author | Zheng, Junyao Tung, Chung-Hsuan Yao, Yuncheng Mehrotra, Nishant Mattu, Sandesh Qi, Zhenzhou Zhuo, Danyang Calderbank, Robert Chen, Tingjun |
| author_facet | Zheng, Junyao Tung, Chung-Hsuan Yao, Yuncheng Mehrotra, Nishant Mattu, Sandesh Qi, Zhenzhou Zhuo, Danyang Calderbank, Robert Chen, Tingjun |
| contents | Orthogonal time frequency space (OTFS) modulation offers superior robustness to high-mobility channels compared to conventional orthogonal frequency-division multiplexing (OFDM) waveforms. However, its explicit delay-Doppler (DD) domain representation incurs substantial signal processing complexity, especially with increased DD domain grid sizes. To address this challenge, we present a scalable, real-time Zak-OTFS receiver architecture on GPUs through hardware--algorithm co-design that exploits DD-domain channel sparsity. Our design leverages compact matrix operations for key processing stages, a branchless iterative equalizer, and a structured sparse channel matrix of the DD domain channel matrix to significantly reduce computational and memory overhead. These optimizations enable low-latency processing that consistently meets the 99.9-th percentile real-time processing deadline. The proposed system achieves up to 906.52 Mbps throughput with a DD grid size of (16384,32) using 16QAM modulation over 245.76 MHz bandwidth. Extensive evaluations under a Vehicular-A channel model demonstrate strong scalability and robust performance across CPU (Intel Xeon) and multiple GPU platforms (NVIDIA Jetson Orin, RTX 6000 Ada, A100, and H200), highlighting the effectiveness of compute-aware Zak-OTFS receiver design for next-generation (NextG) high-mobility communication systems. |
| format | Preprint |
| id |
arxiv_https___arxiv_org_abs_2604_02266 |
| institution | arXiv |
| publishDate | 2026 |
| record_format | arxiv |
| spellingShingle | Real-Time and Scalable Zak-OTFS Receiver Processing on GPUs Zheng, Junyao Tung, Chung-Hsuan Yao, Yuncheng Mehrotra, Nishant Mattu, Sandesh Qi, Zhenzhou Zhuo, Danyang Calderbank, Robert Chen, Tingjun Signal Processing Networking and Internet Architecture Orthogonal time frequency space (OTFS) modulation offers superior robustness to high-mobility channels compared to conventional orthogonal frequency-division multiplexing (OFDM) waveforms. However, its explicit delay-Doppler (DD) domain representation incurs substantial signal processing complexity, especially with increased DD domain grid sizes. To address this challenge, we present a scalable, real-time Zak-OTFS receiver architecture on GPUs through hardware--algorithm co-design that exploits DD-domain channel sparsity. Our design leverages compact matrix operations for key processing stages, a branchless iterative equalizer, and a structured sparse channel matrix of the DD domain channel matrix to significantly reduce computational and memory overhead. These optimizations enable low-latency processing that consistently meets the 99.9-th percentile real-time processing deadline. The proposed system achieves up to 906.52 Mbps throughput with a DD grid size of (16384,32) using 16QAM modulation over 245.76 MHz bandwidth. Extensive evaluations under a Vehicular-A channel model demonstrate strong scalability and robust performance across CPU (Intel Xeon) and multiple GPU platforms (NVIDIA Jetson Orin, RTX 6000 Ada, A100, and H200), highlighting the effectiveness of compute-aware Zak-OTFS receiver design for next-generation (NextG) high-mobility communication systems. |
| title | Real-Time and Scalable Zak-OTFS Receiver Processing on GPUs |
| topic | Signal Processing Networking and Internet Architecture |
| url | https://arxiv.org/abs/2604.02266 |